參數(shù)資料
型號: MC56F8013VFAER2
廠商: Freescale Semiconductor
文件頁數(shù): 100/126頁
文件大?。?/td> 0K
描述: IC DIGITAL SIGNAL CTLR 32-LQFP
標準包裝: 2,000
系列: 56F8xxx
核心處理器: 56800E
芯體尺寸: 16-位
速度: 32MHz
連通性: I²C,SCI,SPI
外圍設(shè)備: POR,PWM,WDT
輸入/輸出數(shù): 26
程序存儲器容量: 16KB(8K x 16)
程序存儲器類型: 閃存
RAM 容量: 2K x 16
電壓 - 電源 (Vcc/Vdd): 3 V ~ 3.6 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 6x12b
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 105°C
封裝/外殼: 32-LQFP
包裝: 帶卷 (TR)
Register Descriptions
56F8013/56F8011 Data Sheet, Rev. 12
Freescale Semiconductor
75
0 = RXD — SCI Receive Data(default)
1 = SDA — I2C Serial Data
Note: The PRECS bit in the OCCS Oscillator Control register can enable this pin as the
source clock to the chip. In this mode, make sure that no on-chip peripheral (including the
GPIO) is driving this pin.
6.3.8.6
Configure GPIOB5 (CFG_B5)—Bit 9
This bit selects the alternate function for GPIOB5.
0 = T1 — Timer Channel 1 input/output(default)
1 = FAULT3 — PWM FAULT3 Input
6.3.8.7
Configure GPIOB4 (CFG_B4)—Bit 8
This bit selects the alternate function for GPIOB4.
0 = T0 — Timer Channel 0 input/output (default)
1 = CLKO — Clock Output
6.3.8.8
Configure GPIOB3 (CFG_B3)—Bit 7
This bit selects the alternate function for GPIOB3.
0 = MOSI — SPI Master Out/Slave In (default)
1 = T3 — Time Channel 3 input/output
6.3.8.9
Configure GPIOB2 (CFG_B2)—Bit 6
This bit selects the alternate function for GPIOB2.
0 = MISO — SPI Master In/Slave Out (default)
1 = T2 — Timer Channel 2 input/output
6.3.8.10
Configure GPIOB1 (CFG_B1)—Bit 5
This bit selects the alternate function for GPIOB1.
0 = SS — SPI Slave Select(default)
1 = SDA— I2C Serial Data
6.3.8.11
Configure GPIOB0 (CFG_B0)—Bit 4
This bit selects the alternate function for GPIOB0.
0 = SCLK — SPI Serial Clock (default)
1 = SCL — I2C Serial Clock
6.3.8.12
Configure GPIOA5[1:0] (CFG_A5)—Bits 3–2
These bits select the alternate function for GPIOA5.
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