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參數(shù)資料
型號(hào): MC56F8013VFAER2
廠商: Freescale Semiconductor
文件頁數(shù): 28/126頁
文件大?。?/td> 0K
描述: IC DIGITAL SIGNAL CTLR 32-LQFP
標(biāo)準(zhǔn)包裝: 2,000
系列: 56F8xxx
核心處理器: 56800E
芯體尺寸: 16-位
速度: 32MHz
連通性: I²C,SCI,SPI
外圍設(shè)備: POR,PWM,WDT
輸入/輸出數(shù): 26
程序存儲(chǔ)器容量: 16KB(8K x 16)
程序存儲(chǔ)器類型: 閃存
RAM 容量: 2K x 16
電壓 - 電源 (Vcc/Vdd): 3 V ~ 3.6 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 6x12b
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 105°C
封裝/外殼: 32-LQFP
包裝: 帶卷 (TR)
Electrical Design Considerations
56F8013/56F8011 Data Sheet, Rev. 12
Freescale Semiconductor
123
Bypass the VDD and VSS with approximately 100μF, plus the number of 0.1μF ceramic capacitors
PCB trace lengths should be minimal for high-frequency signals
Consider all device loads as well as parasitic capacitance due to PCB traces when calculating capacitance.
This is especially critical in systems with higher capacitive loads that could create higher transient currents
in the VDD and VSS circuits.
Take special care to minimize noise levels on the VREF, VDDA and VSSA pins
Using separate power planes for VDD and VDDA and separate ground planes for VSS and VSSA is
recommended. Connect the separate analog and digital power and ground planes as close as possible to
power supply outputs. If both analog circuit and digital circuit are powered by the same power supply, it is
advisable to connect a small inductor or ferrite bead in serial with both VDDA and VSSA traces.
It is highly desirable to physically separate analog components from noisy digital components by ground
planes. Do not place an analog trace in parallel with digital traces. It is also desirable to place an analog
ground trace around an analog signal trace to isolate it from digital traces.
Because the Flash memory is programmed through the JTAG/EOnCE port, SPI, SCI or I2C, the designer
should provide an interface to this port if in-circuit Flash programming is desired.
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