參數(shù)資料
型號： MC56F8345VFGE
廠商： Freescale Semiconductor
文件頁數(shù)： 102/172頁
文件大?。?/td> 0K
描述： IC DSP 16BIT 60MHZ 128-LQFP
標(biāo)準(zhǔn)包裝： 72
系列： 56F8xxx
核心處理器： 56800E
芯體尺寸： 16-位
速度： 60MHz
連通性： CAN，EBI/EMI，SCI，SPI
外圍設(shè)備： POR，PWM，溫度傳感器，WDT
輸入/輸出數(shù)： 49
程序存儲器容量： 136KB（68K x 16）
程序存儲器類型： 閃存
RAM 容量： 6K x 16
電壓 - 電源 (Vcc/Vdd)： 2.25 V ~ 3.6 V
數(shù)據(jù)轉(zhuǎn)換器： A/D 16x12b
振蕩器型： 外部
工作溫度： -40°C ~ 105°C
封裝/外殼： 128-LQFP
包裝： 托盤
配用： MC56F8367EVME-ND - EVAL BOARD FOR MC56F83X
Signal Pins
56F8345 Technical Data, Rev. 17
Freescale Semiconductor
35
Preliminary
RESET
78
Schmitt
Input
Input,
pull-up
enabled
Reset — This input is a direct hardware reset on the processor.
When RESET is asserted low, the device is initialized and placed
in the reset state. A Schmitt trigger input is used for noise
immunity. The internal reset signal will be deasserted
synchronous with the internal clocks after a fixed number of
internal clocks.
To ensure complete hardware reset, RESET and TRST should
be asserted together. The only exception occurs in a debugging
environment when a hardware device reset is required and the
JTAG/EOnCE module must not be reset. In this case, assert
RESET, but do not assert TRST.
Note: The internal Power-On Reset will assert on initial
power-up.
To deactivate the internal pull-up resistor, set the RESET bit in
the SIM_PUDR register. See Part 6.5.6. for details.
RSTO
77
Output
Reset Output — This output reflects the internal reset state of
the chip.
EXTBOOT
Internal
Ground
Schmitt
Input
Input,
pull-up
enabled
External Boot — This input is tied to VDD to force the device to
boot from off-chip memory (assuming that the on-chip Flash
memory is not in a secure state). Otherwise, it is tied to ground.
For details, see Table 4-4.
Note: When this pin is tied low, the customer boot software
should disable the internal pull-up resistor by setting the XBOOT
bit of the SIM_PUDR; see Part 6.5.6.
Note: This pin is internally tied low (to VSS).
EMI_MODE
Internal
Ground
Schmitt
Input
Input,
pull-up
enabled
External Memory Mode — This device will boot from internal
Flash memory under normal operation.
This function is also affected by EXTBOOT and the Flash
security mode; see Table 4-4 for details.
Note: When this pin is tied low, the customer boot software
should disable the internal pull-up resistor by setting the
EMI_MODE bit of the SIM_PUDR; see Part 6.5.6.
Note: This pin is internally tied low (to VSS).
Table 2-2 Signal and Package Information for the 128-Pin LQFP
Signal
Name
Pin No.
Type
State
During
Reset
Signal Description
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
MC56F8346 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:16-bit Digital Signal Controllers
MC56F8346EVM 制造商:Freescale Semiconductor 功能描述:Tools Development kit Kit Contents:Inst
MC56F8346MFV60 功能描述:數(shù)字信號處理器和控制器 - DSP, DSC 60MHz 60MIPS RoHS:否 制造商:Microchip Technology 核心:dsPIC 數(shù)據(jù)總線寬度:16 bit 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:2 KB 最大時鐘頻率:40 MHz 可編程輸入/輸出端數(shù)量:35 定時器數(shù)量:3 設(shè)備每秒兆指令數(shù):50 MIPs 工作電源電壓:3.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-44 安裝風(fēng)格:SMD/SMT
MC56F8346MFVE 功能描述:數(shù)字信號處理器和控制器 - DSP, DSC 16 BIT HYBRID CONTROLLER RoHS:否 制造商:Microchip Technology 核心:dsPIC 數(shù)據(jù)總線寬度:16 bit 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:2 KB 最大時鐘頻率:40 MHz 可編程輸入/輸出端數(shù)量:35 定時器數(shù)量:3 設(shè)備每秒兆指令數(shù):50 MIPs 工作電源電壓:3.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-44 安裝風(fēng)格:SMD/SMT
MC56F8346VFV60 功能描述:數(shù)字信號處理器和控制器 - DSP, DSC 60MHz 60MIPS RoHS:否 制造商:Microchip Technology 核心:dsPIC 數(shù)據(jù)總線寬度:16 bit 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:2 KB 最大時鐘頻率:40 MHz 可編程輸入/輸出端數(shù)量:35 定時器數(shù)量:3 設(shè)備每秒兆指令數(shù):50 MIPs 工作電源電壓:3.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-44 安裝風(fēng)格:SMD/SMT
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