參數(shù)資料
型號： MC56F8356
廠商： Motorola, Inc.
英文描述： 56F8356 16-bit Hybrid Controller
中文描述： 56F8356 16位混合控制器
文件頁數(shù)： 19/160頁
文件大?。?/td> 1380K
代理商： MC56F8356
56F8356 Signal Pins
56F8356 Technical Data
Preliminary
19
D15
(GPIOF8)
137
Input/
Output
Input/
Output
Tri-stated
Input
Data Bus
— D15 specifies part of the data for external
program or data memory accesses.
Port F GPIO
— This GPIO pin can be individually
programmed as an input or output pin.
At reset, this pin defaults to the data bus function.
To deactivate the internal pull-up resistor, clear bit 8 in the
GPIOF_PUR register.
RD
45
Output
Tri-stated
Read Enable
— RD is asserted during external memory
read cycles. When RD is asserted low, pins D0 - D15
become inputs and an external device is enabled onto the
data bus. When RD is deasserted high, the external data is
latched inside the device. When RD is asserted, it qualifies
the A0 - A16, PS, DS, and CSn pins. RD can be connected
directly to the OE pin of a Static RAM or ROM.
Depending upon the state of the DRV bit in the EMI bus
control register (BCR), RD is tri-stated when the external bus
is inactive.
To deactivate the internal pull-up resistor, set the CTRL bit
in the SIM_PUDR register.
WR
44
Output
Tri-stated
Write Enable
— WR is asserted during external memory
write cycles. When WR is asserted low, pins D0 - D15
become outputs and the device puts data on the bus.
When WR is deasserted high, the external data is latched
inside the external device. When WR is asserted, it
qualifies the A0 - A16, PS, DS, and CSn pins. WR can be
connected directly to the WE pin of a static RAM.
Depending upon the state of the DRV bit in the EMI bus
control register (BCR), WR is tri-stated when the external bus
is inactive.
To deactivate the internal pull-up resistor, set the CTRL bit
in the SIM_PUDR register.
Table 2-2 56F8356 Signal and Package Information for the 144-Pin LQFP
Signal Name
Pin No.
Type
State
During
Reset
Signal Description
F
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
n
.
相關(guān)PDF資料
PDF描述
MC56F8356VFV60 56F8356 16-bit Hybrid Controller
MC56F8356MFV60 56F8356 16-bit Hybrid Controller
MC56F8357 16-bit Digital Signal Processor
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
MC56F8356MFV60 制造商:Rochester Electronics LLC 功能描述:- Bulk
MC56F8356MFVE 功能描述:數(shù)字信號處理器和控制器 - DSP, DSC 16 BIT HYBRID CONTROLLER RoHS:否 制造商:Microchip Technology 核心:dsPIC 數(shù)據(jù)總線寬度:16 bit 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:2 KB 最大時鐘頻率:40 MHz 可編程輸入/輸出端數(shù)量:35 定時器數(shù)量:3 設(shè)備每秒兆指令數(shù):50 MIPs 工作電源電壓:3.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-44 安裝風(fēng)格:SMD/SMT
MC56F8356VFV60 功能描述:數(shù)字信號處理器和控制器 - DSP, DSC 60MHz 60MIPS RoHS:否 制造商:Microchip Technology 核心:dsPIC 數(shù)據(jù)總線寬度:16 bit 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:2 KB 最大時鐘頻率:40 MHz 可編程輸入/輸出端數(shù)量:35 定時器數(shù)量:3 設(shè)備每秒兆指令數(shù):50 MIPs 工作電源電壓:3.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-44 安裝風(fēng)格:SMD/SMT
MC56F8356VFVE 功能描述:數(shù)字信號處理器和控制器 - DSP, DSC 60MHz 60MIPS RoHS:否 制造商:Microchip Technology 核心:dsPIC 數(shù)據(jù)總線寬度:16 bit 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:2 KB 最大時鐘頻率:40 MHz 可編程輸入/輸出端數(shù)量:35 定時器數(shù)量:3 設(shè)備每秒兆指令數(shù):50 MIPs 工作電源電壓:3.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-44 安裝風(fēng)格:SMD/SMT
MC56F8357 制造商:未知廠家 制造商全稱:未知廠家 功能描述:16-BIT HYBRID CONTROLLERS
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