參數資料
型號： MC56F8356
廠商： Motorola, Inc.
英文描述： 56F8356 16-bit Hybrid Controller
中文描述： 56F8356 16位混合控制器
文件頁數： 35/160頁
文件大?。?/td> 1380K
代理商： MC56F8356
Program Map
56F8356 Technical Data
Preliminary
35
4.2 Program Map
The operating mode control bits (MA and MB) in the Operating Mode Register (OMR) control the
Program memory map. At reset, these bits are set as indicated in
Table 4-2
.
Table 4-4
shows the
memory map configurations that are possible at reset. After reset, the OMR MA bit can be changed
and will have an effect on the P-space memory map, as shown in
Table 4-3
. Changing the OMR
MB bit will have no effect.
The 56F8356’s external memory interface (EMI) can operate much like the 56F80x family’s EMI,
or it can be operated in a mode similar to that used on other products in the 56800E family. Initially,
CS0 and CS1 are configured as PS and DS, in a mode compatible with earlier 56800 devices.
Eighteen address lines are required to shadow the first 192K of internal program space when
booting externally for development purposes. Therefore, the entire complement of on-chip
memory cannot be accessed using a 16-bit 56800-compatible address bus. To address this
situation, the EMI_MODE pin can be used to configure four GPIO pins as Address[19:16] upon
reset (only one of these pins [A16] is usable in the 56F8356).
The EMI_MODE pin also affects the reset vector address, as provided in
Table 4-4
.
Additional
pins must be configured as address or chip select signals to access addresses at P:$10 0000 and
above.
Table 4-2 OMR MB/MAL Value at Reset
OMR MB =
Flash Secured
State
1,
2
1.
This bit is only configured at reset. If the Flash secured state changes, this will not be reflected in MB until the next reset.
2.
Changing MB in software will not affect Flash memory security.
OMR MA =
EXTBOOT Pin
Chip Operating Mode
0
0
Mode 0 – Internal Boot; EMI is configured to use 16 address lines; Flash
Memory is secured; external P-space is not allowed; the EOnCE is disabled
0
1
Not valid; cannot boot externally if the Flash is secured and will actually
configure to 00 state
1
0
Mode 0 – Internal Boot; EMI is configured to use 16 address lines
1
1
Mode 1 – External Boot; Flash Memory is not secured; EMI configuration is
determined by the state of the EMI_MODE pin
Table 4-3 Changing OMR MA Value During Normal Operation
OMR MA
Chip Operating Mode
0
Use internal P-space memory map configuration
1
Use external P-space memory map configuration – If MB = 0 at reset, changing this bit has no
effect.
F
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
n
.
相關PDF資料
PDF描述
MC56F8356VFV60 56F8356 16-bit Hybrid Controller
MC56F8356MFV60 56F8356 16-bit Hybrid Controller
MC56F8357 16-bit Digital Signal Processor
MC56F8357 16-BIT HYBRID CONTROLLERS
MC56F8357MPY60 16-bit Digital Signal Processor
相關代理商/技術參數
參數描述
MC56F8356MFV60 制造商:Rochester Electronics LLC 功能描述:- Bulk
MC56F8356MFVE 功能描述:數字信號處理器和控制器 - DSP, DSC 16 BIT HYBRID CONTROLLER RoHS:否 制造商:Microchip Technology 核心:dsPIC 數據總線寬度:16 bit 程序存儲器大小:16 KB 數據 RAM 大小:2 KB 最大時鐘頻率:40 MHz 可編程輸入/輸出端數量:35 定時器數量:3 設備每秒兆指令數:50 MIPs 工作電源電壓:3.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-44 安裝風格:SMD/SMT
MC56F8356VFV60 功能描述:數字信號處理器和控制器 - DSP, DSC 60MHz 60MIPS RoHS:否 制造商:Microchip Technology 核心:dsPIC 數據總線寬度:16 bit 程序存儲器大小:16 KB 數據 RAM 大小:2 KB 最大時鐘頻率:40 MHz 可編程輸入/輸出端數量:35 定時器數量:3 設備每秒兆指令數:50 MIPs 工作電源電壓:3.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-44 安裝風格:SMD/SMT
MC56F8356VFVE 功能描述:數字信號處理器和控制器 - DSP, DSC 60MHz 60MIPS RoHS:否 制造商:Microchip Technology 核心:dsPIC 數據總線寬度:16 bit 程序存儲器大小:16 KB 數據 RAM 大小:2 KB 最大時鐘頻率:40 MHz 可編程輸入/輸出端數量:35 定時器數量:3 設備每秒兆指令數:50 MIPs 工作電源電壓:3.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-44 安裝風格:SMD/SMT
MC56F8357 制造商:未知廠家 制造商全稱:未知廠家 功能描述:16-BIT HYBRID CONTROLLERS
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