參數(shù)資料
型號(hào): MC68HC05BD5P
廠商: FREESCALE SEMICONDUCTOR INC
元件分類: 微控制器/微處理器
英文描述: 8-BIT, MROM, 2.1 MHz, MICROCONTROLLER, PDIP40
封裝: PLASTIC, DIP-40
文件頁(yè)數(shù): 110/112頁(yè)
文件大小: 864K
代理商: MC68HC05BD5P
MC68HC05BD3
MOTOROLA
12-5
ELECTRICAL SPECIFICATIONS
12
12.6
Sync Signal Processor Timing
Table 12-5 Sync Signal Processor Timing
(VDD=5.0Vdc ±10%, VSS=0Vdc, temperature range=0 to 70°C)
PARAMETER
SYMBOL
MINIMUM
MAXIMUM
UNIT
VSYNC input sync pulse
tVI.SP
1tCYC
HSYNC input sync pulse
(except for composite sync input)
tHI.SP
1tCYC
VTTL output sync pulse width for separate sync input
tVO.SP
same as input
VTTL output sync pulse width for composite sync input
tVO.CO
input + 9.5
s input + 10s
HTTL output sync pulse width
tHO
same as input
Free-running VTTL output sync pulse (SOUT clear)
tFVO.SP
128
tCYC
Free-running VTTL output period (SOUT clear)
tFVO
31488
tCYC
Free-running HTTL output sync pulse (SOUT clear)
tFHO.SP
4tCYC
Free-running HTTL output period (SOUT clear)
tFHO
41/32
tCYC
Inserted HTTL sync pulse (INSRT cleared)
tIHI.SP
4tCYC
Inserted HTTL period error (INSRT cleared)
tIHI.ER
–1
tCYC
VSYNC to VTTL delay (8pF loading)
tVDD
30
40
ns
HSYNC to HTTL delay (8pF loading)
tHHD
30
40
ns
HSYNC to VTTL delay (composite sync)
tHVD
30
40
ns
TPG
95
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Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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