參數(shù)資料
型號(hào): MC68HC05C8A
廠商: Motorola, Inc.
英文描述: Microcontrollers
中文描述: 微控制器
文件頁數(shù): 130/158頁
文件大?。?/td> 773K
代理商: MC68HC05C8A
Electrical Specifications
Technical Data
MC68HC05C8A
MC68HCL05C8A
MC68HSC05C8A
Rev. 5.0
130
Electrical Specifications
MOTOROLA
Figure 13-5. External Interrupt Timing
Figure 13-6. External Reset Timing
NORMALLY USED
WTH WRED-OR
CONNECTION
IRQ
t
ILIH
t
ILIL
t
ILIH
IRQ PIN
IRQ
1
.
.
.
IRQ
n
a. Edge-Sensitive Trigger Condition.
The minimum pulse width (t
ILIH
) is either 125 ns (f
OP
= 2.1 MHz)
or 250 ns (f
= 1 MHz). The period t
should not be less than the number of t
CYC
cycles it takes to
execute the interrupt service routine plus 19 t
CYC
cycles.
b. Level-Sensitive Trigger Condition.
If after servicing an interrupt the IRQ remains low, the
next interrupt is recognized.
(INTERNAL)
INTERNAL
CLOCK
(1)
INTERNAL
ADDRESS BUS
(1)
Notes:
1. Internal clock, internal address bus, and internal data bus are not available externally.
2. The next rising edge of the internal clock after the rising edge of RESET initiates the reset sequence.
INTERNAL
DATA BUS
(1)
1FFE
1FFE
1FFF
NEW PC
NEW
PCH
t
RL
NEW
PCL
OP
CODE
RESET
(2)
1FFE
1FFE
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