參數(shù)資料
型號(hào): MC68HC05C8A
廠商: Motorola, Inc.
英文描述: Microcontrollers
中文描述: 微控制器
文件頁(yè)數(shù): 81/158頁(yè)
文件大?。?/td> 773K
代理商: MC68HC05C8A
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Serial Communications Interface (SCI)
SCI Input/Output (I/O) Registers
MC68HC05C8A
MC68HCL05C8A
MC68HSC05C8A
Rev. 5.0
Technical Data
MOTOROLA
Serial Communications Interface (SCI)
81
ILIE
Idle Line Interrupt Enable Bit
This read/write bit enables SCI interrupt requests when the IDLE bit
becomes set. Reset clears the ILIE bit.
1 = IDLE interrupt requests enabled
0 = IDLE interrupt requests disabled
TE
Transmit Enable Bit
Setting this read/write bit begins the transmission by sending a
preamble of 10 or 11 logic 1s from the transmit shift register to the
PD1/TDO pin. Reset clears the TE bit.
1 = Transmission enabled
0 = Transmission disabled
RE
Receive Enable Bit
Setting this read/write bit enables the receiver. Clearing the RE bit
disables the receiver and receiver interrupts but does not affect the
receiver interrupt flags. Reset clears the RE bit.
1 = Receiver enabled
0 = Receiver disabled
RWU
Receiver Wakeup Enable Bit
This read/write bit puts the receiver in a standby state. Typically, data
transmitted to the receiver clears the RWU bit and returns the receiver
to normal operation. The WAKE bit in SCCR1 determines whether an
idle input or an address mark brings the receiver out of the standby
state. Reset clears the RWU bit.
1 = Standby state
0 = Normal operation
SBK
Send Break Bit
Setting this read/write bit continuously transmits break codes in the
form of 10-bit or 11-bit groups of logic 0s. Clearing the SBK bit stops
the break codes and transmits a logic 1 as a start bit. Reset clears the
SBK bit.
1 = Break codes being transmitted
0 = No break codes being transmitted
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