參數(shù)資料
型號: MC68HC05C8A
廠商: Motorola, Inc.
英文描述: Microcontrollers
中文描述: 微控制器
文件頁數(shù): 64/158頁
文件大?。?/td> 773K
代理商: MC68HC05C8A
Timer
Technical Data
MC68HC05C8A
MC68HCL05C8A
MC68HSC05C8A
Rev. 5.0
64
Timer
MOTOROLA
After a read of the input capture register ($14) MSB, the counter transfer
is inhibited until the LSB ($15) is also read. This characteristic causes
the time used in the input capture software routine and its interaction with
the main program to determine the minimum pulse period.
A read of the input capture register LSB ($15) does not inhibit the free-
running counter transfer, since they occur on opposite edges of the
internal bus clock.
Figure 8-3
shows the logic of the input capture
function.
Figure 8-3. Input Capture Operation
INPUT CAPTURE REGISTER HIGH
$0014
INPUT CAPTURE REGISTER LOW
$0015
TIMER REGISTER HIGH
TCMP
EDGE
SELECT/DETECT
LOGIC
TIMER
INTERRUPT
REQUEST
TIMER REGISTER LOW
15
0
15
8 7
0
TIMER STATUS REGISTER
$0013
TIMER CONTROL REGISTER
$0012
I
O
T
I
O
T
8 7
$0018
$0019
I
LATCH
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