參數(shù)資料
型號: MC68HC05E6CFB
廠商: FREESCALE SEMICONDUCTOR INC
元件分類: 微控制器/微處理器
英文描述: 8-BIT, MROM, 2.1 MHz, MICROCONTROLLER, PQFP44
封裝: PLASTIC, QFP-44
文件頁數(shù): 120/140頁
文件大小: 1584K
代理商: MC68HC05E6CFB
Resets and Interrupts
MC68HC05E6 — Rev. 1.0
Resets and Interrupts
Alternatively, during power-down, when the power to VDD has fallen below
a useful operating level, the LVI interrupt will not be generated until the LVI
input pin has been driven low (see Figure 21).
Having dropped to a level which drives the LVI pin low, while staying
above the data retention level, the power supply then rises again to the
normal operating range along with a low to high transition of LVI, an
interrupt will be generated to wake-up the CPU. The system clock is
restarted if it was halted using the STOP instruction (see Figure 22).
NOTE:
All interrupts which should not wake-up the CPU should be disabled
prior to entering the low power mode.
Figure 20 LVI power-on sequence
Figure 21 LVI power-down sequence
VDD
Internal POR
LVI input
CPU reset sequence
VDD
LVI input
LVI interrupt routine (if enabled)
Interrupt handling and shutdown sequence
8-resets
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Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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