參數(shù)資料
型號(hào): MC68HC05E6CFB
廠商: FREESCALE SEMICONDUCTOR INC
元件分類: 微控制器/微處理器
英文描述: 8-BIT, MROM, 2.1 MHz, MICROCONTROLLER, PQFP44
封裝: PLASTIC, QFP-44
文件頁(yè)數(shù): 93/140頁(yè)
文件大?。?/td> 1584K
代理商: MC68HC05E6CFB
第1頁(yè)第2頁(yè)第3頁(yè)第4頁(yè)第5頁(yè)第6頁(yè)第7頁(yè)第8頁(yè)第9頁(yè)第10頁(yè)第11頁(yè)第12頁(yè)第13頁(yè)第14頁(yè)第15頁(yè)第16頁(yè)第17頁(yè)第18頁(yè)第19頁(yè)第20頁(yè)第21頁(yè)第22頁(yè)第23頁(yè)第24頁(yè)第25頁(yè)第26頁(yè)第27頁(yè)第28頁(yè)第29頁(yè)第30頁(yè)第31頁(yè)第32頁(yè)第33頁(yè)第34頁(yè)第35頁(yè)第36頁(yè)第37頁(yè)第38頁(yè)第39頁(yè)第40頁(yè)第41頁(yè)第42頁(yè)第43頁(yè)第44頁(yè)第45頁(yè)第46頁(yè)第47頁(yè)第48頁(yè)第49頁(yè)第50頁(yè)第51頁(yè)第52頁(yè)第53頁(yè)第54頁(yè)第55頁(yè)第56頁(yè)第57頁(yè)第58頁(yè)第59頁(yè)第60頁(yè)第61頁(yè)第62頁(yè)第63頁(yè)第64頁(yè)第65頁(yè)第66頁(yè)第67頁(yè)第68頁(yè)第69頁(yè)第70頁(yè)第71頁(yè)第72頁(yè)第73頁(yè)第74頁(yè)第75頁(yè)第76頁(yè)第77頁(yè)第78頁(yè)第79頁(yè)第80頁(yè)第81頁(yè)第82頁(yè)第83頁(yè)第84頁(yè)第85頁(yè)第86頁(yè)第87頁(yè)第88頁(yè)第89頁(yè)第90頁(yè)第91頁(yè)第92頁(yè)當(dāng)前第93頁(yè)第94頁(yè)第95頁(yè)第96頁(yè)第97頁(yè)第98頁(yè)第99頁(yè)第100頁(yè)第101頁(yè)第102頁(yè)第103頁(yè)第104頁(yè)第105頁(yè)第106頁(yè)第107頁(yè)第108頁(yè)第109頁(yè)第110頁(yè)第111頁(yè)第112頁(yè)第113頁(yè)第114頁(yè)第115頁(yè)第116頁(yè)第117頁(yè)第118頁(yè)第119頁(yè)第120頁(yè)第121頁(yè)第122頁(yè)第123頁(yè)第124頁(yè)第125頁(yè)第126頁(yè)第127頁(yè)第128頁(yè)第129頁(yè)第130頁(yè)第131頁(yè)第132頁(yè)第133頁(yè)第134頁(yè)第135頁(yè)第136頁(yè)第137頁(yè)第138頁(yè)第139頁(yè)第140頁(yè)
Programmable Timer
MC68HC05E6 — Rev. 1.0
Programmable Timer
TOIE — Timer overflow interrupt enable
1 = Timer overflow interrupt enabled.
0 = Timer overflow interrupt disabled.
IEDG — Input edge
1 = TCAP is positive-going edge sensitive.
0 = TCAP is negative-going edge sensitive.
When IEDG is set, a positive-going edge on the TCAP pin will trigger
a transfer of the free-running counter value to the input capture
register. When clear, a negative-going edge triggers the transfer.
OLV — Output level
1 = A high output level will appear on the TCMP pin.
0 = A low output level will appear on the TCMP pin.
When OLV is set, a high output level will be clocked into the output
level register by the next successful output compare, and will appear
on the TCMP pin. When clear, it will be a low level that will appear on
the TCMP pin.
Timer status
register TSR
The timer status register at location ($13) contains the status bits for the
input capture, output compare and timer overflow interrupt conditions.
Accessing the timer status register satisfies the first condition required
to clear the status bits. The remaining step is to access the register
corresponding to the status bit.
ICF — Input capture flag
1 = A valid input capture has occurred.
0 = No input capture has occurred.
This bit is set when the selected polarity of edge is detected by the
input capture edge detector; an input capture interrupt will be
generated if ICIE is set. ICF is cleared by reading the TSR and then
the input capture low register at $15.
Address bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
State
on reset
Timer status (TSR)
$0013
ICF
OCF
TOF
00000
uuu0 0000
6-ptimer
F
re
e
sc
a
le
S
e
m
ic
o
n
d
u
c
to
r,
I
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
n
c
..
.
相關(guān)PDF資料
PDF描述
MC68HC05E6CDW 8-BIT, MROM, 2.1 MHz, MICROCONTROLLER, PDSO28
MC68HC05E6MFB 8-BIT, MROM, 2.1 MHz, MICROCONTROLLER, PQFP44
MC68HC05E6VDWR2 8-BIT, MROM, 2.1 MHz, MICROCONTROLLER, PDSO28
MC68HC705E6MFB 8-BIT, OTPROM, 2.1 MHz, MICROCONTROLLER, PQFP44
MC68HC705E6CFB 8-BIT, OTPROM, 2.1 MHz, MICROCONTROLLER, PQFP44
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
MC68HC05E6DW 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:HCMOS Microcontroller Unit
MC68HC05E6FB 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:HCMOS Microcontroller Unit
MC68HC05E6MDW 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:HCMOS Microcontroller Unit
MC68HC05E6MFB 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:HCMOS Microcontroller Unit
MC68HC05E6VDW 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:HCMOS Microcontroller Unit