參數(shù)資料
型號: MC68HC05RC17DW
廠商: MOTOROLA INC
元件分類: 微控制器/微處理器
英文描述: 8-BIT, MROM, 2.097 MHz, MICROCONTROLLER, PDSO28
封裝: SOIC-28
文件頁數(shù): 82/128頁
文件大?。?/td> 561K
代理商: MC68HC05RC17DW
Low-Power Modes
Wait Mode
MC68HC05RC17 Rev. 2.0
General Release Specification
MOTOROLA
Low-Power Modes
57
NON-DISCLOSURE
AGREEMENT
REQUIRED
During wait mode, the I bit in the CCR is cleared to enable interrupts. All
other registers, memory, and input/output lines remain in their previous
states. The timer may be enabled to allow a periodic exit from wait mode.
NOTE:
For minimum current consumption, the phase-locked loop (PLL) should
be disabled or turned off before entering wait mode.
Figure 6-2. Stop/Wait Flowchart
TURN ON OSCILLATOR.
WAIT FOR TIME
DELAY TO STABILIZE.
1. FETCH RESET
VECTOR OR
2. SERVICE
INTERRUPT
A. STACK
B. SET I BIT
C. VECTOR TO
INTERRUPT
ROUTINE
RESTART
PROCESSOR CLOCK.
1. FETCH RESET
VECTOR OR
2. SERVICE
INTERRUPT
A. STACK
B. SET I BIT
C. VECTOR TO
INTERRUPT
ROUTINE
Y
N
STOP
WAIT
OSCILLATOR ACTIVE.
CORE TIMER CLOCK ACTIVE.
PROCESSOR CLOCKS
STOPPED.
STOP OSCILLATOR
AND ALL CLOCKS.
CLEAR I BIT.
IR TIMER
INTERNAL
INTERRUPT?
CORE TIMER
INTERNAL
INTERRUPT?
N
Y
IR TIMER CLOCK ACTIVE.
EXTERNAL
INTERRUPT
(IRQ)?
(PTB KEYSCAN PULLUPS)
EXTERNAL
(IRQ)?
(PTB KEYSCAN PULLUPS)
INTERRUPT
LPRST
OR
RESET?
LPRST
OR
RESET?
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