參數(shù)資料
型號: MC68HC11D3CFN2
廠商: ABILIS SYSTEMS
元件分類: 微控制器/微處理器
英文描述: 8-BIT, MROM, 2 MHz, MICROCONTROLLER, PQCC44
封裝: PLASTIC, LCC-44
文件頁數(shù): 99/138頁
文件大小: 1047K
代理商: MC68HC11D3CFN2
Port C
MC68HC711D3 Data Sheet, Rev. 2.1
Freescale Semiconductor
63
5.4 Port C
Port C is an 8-bit, general-purpose I/O port with a data register (PORTC) and a data direction register
(DDRC). In the single-chip mode, port C pins are general-purpose I/O pins (PC7–PC0). In the
expanded-multiplexed mode, port C pins are configured as multiplexed address/data pins. During the
address cycle, bits 7–0 of the address are output on PC7–PC0. During the data cycle, bits 7–0
(PC7–PC0) are bidirectional data pins controlled by the R/W signal.
5.4.1 Port C Control Register
CWOM — Port C Wire-OR Mode Bit
1 = Port C outputs are open drain (to facilitate testing)
0 = Port C operates normally
5.4.2 Port C Data Register
PORTC can be read at any time. Inputs return the sensed levels at the pin, while outputs return the input
level of the port C pin drivers. If PORTC is written, the data is stored in an internal latch and can be driven
only if port C is configured for general-purpose outputs in single-chip or bootstrap mode.
Port C pins are general-purpose inputs out of reset in single-chip and bootstrap modes. These pins are
multiplexed low-order address and data bus lines out of reset in expanded-multiplexed and test modes.
5.4.3 Port C Data Direction Register
DDC7–DDC0 — Data Direction Bits for Port C
1 = Corresponding port C pin is configured as output
0 = Corresponding port C pin is configured for input only
Address:
$0002
Bit 7
654321
Bit 0
Read:
00
CWOM
00000
Write:
Reset:
00000000
Figure 5-4. Port C Control Register (PIOC)
Address:
$0003
Bit 7
654321
Bit 0
Read:
PC7
PC6
PC5
PC4
PC3
PC2
PC1
PC0
Write:
Reset:
00000000
Figure 5-5. Port C Data Register (PORTC)
Address:
$0007
Bit 7
654321
Bit 0
Read:
DDC7
DDC6
DDC5
DDC4
DDC3
DDC2
DDC1
DDC0
Write:
Reset:
00000000
Figure 5-6. Data Direction Register for Port C (DDRC)
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