參數(shù)資料
型號： MC68HC681P
廠商： MOTOROLA INC
元件分類： 微控制器/微處理器
英文描述： 2 CHANNEL(S), 1M bps, SERIAL COMM CONTROLLER, PDIP40
封裝： PLASTIC, DIP-40
文件頁數(shù)： 46/88頁
文件大?。?/td> 461K
代理商： MC68HC681P
Programming and Register Descriptions
4-20
MC68HC681 USER’S MANUAL
MOTOROLA
4
4.3.9.6 CHANNEL A TRANSMITTER READY - SRA[2]. This bit (when set) indicates
that the transmit holding register is empty and ready to be loaded with a character.
Transmitter ready is set when the character is transferred to the transmit shift register.
This bit is cleared when the the CPU loads the transmit holding register, or when the
transmitter is disabled.
4.3.9.7 CHANNEL A FIFO FULL - SRA[1]. This bit is set when a character is transferred
from the receive shift register to the receiver FIFO and the transfer fills the FIFO; i.e., all
three FIFO holding register positions are occupied. It is cleared when the CPU reads the
receiver buffer, unless a fourth character is in the receive shift register waiting for an
empty FIFO slot.
4.3.9.8 CHANNEL A RECEIVER READY - SRA[0]. This bit indicates that one or more
character(s) has been received and is waiting in the FIFO for the CPU to read it. It is set
when the first character is transferred from the receive shift register to the empty FIFO,
and cleared when the CPU reads the receiver buffer, if there are no more characters in
the FIFO after the read.
4.3.10 Channel B Status Register (SRB)
The bit definitions for this register are identical to those for SRA, except the status applies
to the channel B receiver and transmitter and their corresponding inputs and outputs.
4.3.11 Output Port Configuration Register (OPCR)
This register individually configures each bit of the 8-bit parallel output port for general-
purpose use or an auxiliary function serving the communication channels.
4.3.11.1 OP7 OUTPUT SELECT - OPCR[7]. This bit programs the parallel output OP7
to provide either the complement of OPR[7] or the channel B transmitter interrupt output,
which is the complement of ISR[4] (not masked by the interrupt mask register). When
configured for the channel B transmitter interrupt, OP7 acts as an open-collector output.
4.3.11.2 OP6 OUTPUT SELECT - OPCR[6]. This bit programs the parallel output OP6
to provide either the complement of OPR[6] or the channel A transmitter interrupt output,
which is the complement of ISR[0] (not masked by the interrupt mask register). When
configured for the channel A transmitter interrupt, OP6 acts as an open-collector output.
4.3.11.3 OP5 OUTPUT SELECT - OPCR[5]. This bit programs the parallel output OP5
to provide either the complement of OPR[5] or the channel B receiver interrupt output,
which is the complement of ISR[5] (not masked by the interrupt mask register). When
configured for the channel B receiver interrupt, OP5 acts as an open-collector output.
4.3.11.4 OP4 OUTPUT SELECT - OPCR[4]. This bit programs the parallel output OP4
to provide either the complement of OPR[4] or the channel A receiver interrupt output,
which is the complement of ISR[1] (not masked by the interrupt-mask register). When
configured for the channel A receiver interrupt, OP4 acts as an open-collector output.
相關(guān)PDF資料
PDF描述
MC68HC58FN 1 CHANNEL(S), LOCAL AREA NETWORK CONTROLLER, PQCC28
MC68HC58DW 1 CHANNEL(S), LOCAL AREA NETWORK CONTROLLER, PDSO28
MC68HC68T1P 1 TIMER(S), REAL TIME CLOCK, PDIP16
MC68HC705B16NVFNR2 8-BIT, OTPROM, 2.1 MHz, MICROCONTROLLER, PQCC52
MC68HC705B16NCFNR2 8-BIT, OTPROM, 2.1 MHz, MICROCONTROLLER, PQCC52
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
MC68HC68T1P 制造商:Motorola Inc 功能描述:
MC68HC705B16CFN 制造商:Motorola Inc 功能描述:
MC68HC705B16FN 制造商:Rochester Electronics LLC 功能描述:
MC68HC705B16NB 制造商:Rochester Electronics LLC 功能描述:
MC68HC705B16NCB 制造商:Rochester Electronics LLC 功能描述:
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。

采購需求

(若只采購一條型號，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進(jìn)入我的后臺，查看報價

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進(jìn)入我的后臺，查看報價

*型號 *數(shù)量 廠商 批號 封裝
添加更多采購

我的聯(lián)系方式

*
*
*