參數(shù)資料
型號： MC68HC705E6
廠商： 飛思卡爾半導體(中國)有限公司
英文描述： HCMOS Microcontroller Unit
中文描述： HCMOS微控制器
文件頁數(shù)： 71/140頁
文件大小： 788K
代理商： MC68HC705E6
A-to-D Converter
A/D converter during STOP mode
MC68HC05E6 — Rev. 1.0
A-to-D Converter
7-adc
A/D converter during STOP mode
In STOP mode the comparator and charge pump are turned off and the
A/D converter ceases to operate. Any pending conversion is aborted.
A/D analog input
The external analog voltage value to be processed by the A/D converter
is sampled on an internal capacitor through a resistive path, provided by
input-selection switches and a sampling aperture time switch, as shown
in
Figure 17
. Sampling time is limited to 12 bus clock cycles. After
sampling, the analog value is stored on the capacitor and held until the
end of conversion. During this hold time, the analog input is
disconnected from the internal A/D system and the external voltage
source sees a high impedance input.
The equivalent analog input during sampling is an RC low-pass filter with
a minimum resistance of 50 k
and a capacitance of at least 10pF. (It
should be noted that these are typical values measured at room
temperature).
Figure 17 Electrical model of an A/D input pin
Analog
input
pin
(AD0–AD3)
Input protection device
V
REFL
< 2pF
+ ~20V
– ~0.7V
400 nA
junction
leakage
≥
50k
≥
10pF
DAC
capacitance
The analog switch is closed during the 12 cycle sample time only.
F
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
n
.
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相關代理商/技術參數(shù)
參數(shù)描述
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