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參數(shù)資料
| 型號： | MC68HC705J5A |
| 廠商： | 飛思卡爾半導(dǎo)體(中國)有限公司 |
| 英文描述： | 8-bit microcontroller units |
| 中文描述： | 8位微控制器單元 |
| 文件頁數(shù)： | 67/106頁 |
| 文件大小： | 670K |
| 代理商： | MC68HC705J5A |
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July 16, 1999
GENERAL RELEASE SPECIFICATION
16-BIT TIMER
REV 2.1
9-9
IEDG - INPUT CAPTURE EDGE SELECT
The state of this read/write bit determines whether a positive or negative transi-
tion on the TCAP pin triggers a transfer of the contents of the timer register to
the input capture register. Reset has no effect on the IEDG bit.
1 =
Positive edge (low to high transition) triggers input capture.
0 =
Negative edge (high to low transition) triggers input capture.
9.5
TIMER1 STATUS REGISTER (T1SR)
The timer status register (T1SR) shown in
Figure 9-12
contains flags for the fol-
lowing events:
An active signal on the PB0/TCAP pin, transferring the contents of the
timer registers to the input capture registers.
An overflow of the timer registers from $FFFF to $0000.
Writing to any of the bits in the T1SR has no effect. Reset does not change the
state of any of the flag bits in the T1SR.
ICF - INPUT CAPTURE FLAG
The ICF bit is automatically set when an edge of the selected polarity occurs on
the PB0/TCAP pin. Clear the ICF bit by reading the timer status register with
the ICF set, and then reading the low byte (ICL, $0015) of the input capture
registers. Reset has no effect on ICF.
T1OF - TIMER1 OVERFLOW FLAG
The T1OF bit is automatically set when the 16-bit timer counter rolls over from
$FFFF to $0000. Clear the T1OF bit by reading the timer status register with
the T1OF set, and then accessing the low byte (TCNTL, $0019) of the timer
registers. Reset has no effect on T1OF.
9.6
TIMER1 OPERATION DURING WAIT MODE
During WAIT mode the 16-bit timer continues to operate normally and may gener-
ate an interrupt to trigger the MCU out of the WAIT mode.
9.7
TIMER1 OPERATION DURING STOP MODE
When the MCU enters the STOP mode the free-running counter stops counting
(the internal processor clock is stopped). It remains at that particular count value
until the STOP mode is exited by applying a low signal to the IRQ pin, at which
BIT 7
ICF
BIT 6
0
BIT 5
T1OF
BIT 4
0
BIT 3
0
BIT 2
0
BIT 1
0
BIT 0
0
T1SR
$0013
R
W
reset:
U
U
U
0
0
0
0
0
U = UNAFFECTED BY RESET
Figure 9-12. Timer Status Registers (T1SR)
F
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
n
.
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| MC68HC705J5ACP | 制造商:Motorola Inc 功能描述: 制造商:MOTOROLA 功能描述: |
| MC68HC705JB4DW | 制造商:Motorola Inc 功能描述: 制造商:MOTOROLA 功能描述: |
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| MC68HC705JP7CDW | 功能描述:IC MCU 8BIT 28-SOIC RoHS:否 類別:集成電路 (IC) >> 嵌入式 - 微控制器， 系列:HC05 其它有關(guān)文件:STM32F101T8 View All Specifications 特色產(chǎn)品:STM32 32-bit Cortex MCUs 標(biāo)準(zhǔn)包裝:490 系列:STM32 F1 核心處理器:ARM? Cortex?-M3 芯體尺寸:32-位 速度:36MHz 連通性:I²C，IrDA，LIN，SPI，UART/USART 外圍設(shè)備:DMA，PDR，POR，PVD，PWM，溫度傳感器，WDT 輸入/輸出數(shù):26 程序存儲器容量:64KB（64K x 8） 程序存儲器類型:閃存 EEPROM 大小:- RAM 容量:10K x 8 電壓 - 電源 (Vcc/Vdd):2 V ~ 3.6 V 數(shù)據(jù)轉(zhuǎn)換器:A/D 10x12b 振蕩器型:內(nèi)部 工作溫度:-40°C ~ 85°C 封裝/外殼:36-VFQFN，36-VFQFPN 包裝:托盤 配用:497-10030-ND - STARTER KIT FOR STM32497-8853-ND - BOARD DEMO STM32 UNIV USB-UUSCIKSDKSTM32-PL-ND - KIT IAR KICKSTART STM32 CORTEXM3497-8512-ND - KIT STARTER FOR STM32F10XE MCU497-8505-ND - KIT STARTER FOR STM32F10XE MCU497-8304-ND - KIT STM32 MOTOR DRIVER BLDC497-6438-ND - BOARD EVALUTION FOR STM32 512K497-6289-ND - KIT PERFORMANCE STICK FOR STM32MCBSTM32UME-ND - BOARD EVAL MCBSTM32 + ULINK-MEMCBSTM32U-ND - BOARD EVAL MCBSTM32 + ULINK2更多... 其它名稱:497-9032STM32F101T8U6-ND |
| MC68HC705JP7CP | 制造商:Rochester Electronics LLC 功能描述: 制造商:Freescale Semiconductor 功能描述: |
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