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| 型號： | MC68HC705P6ADW |
| 廠商： | FREESCALE SEMICONDUCTOR INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, OTPROM, 2.1 MHz, MICROCONTROLLER, PDSO28 |
| 封裝： | SOIC-28 |
| 文件頁數(shù)： | 27/98頁 |
| 文件大?。?/td> | 532K |
| 代理商： | MC68HC705P6ADW |
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MC68HC705P6A Advance Information Data Sheet, Rev. 2.1
Freescale Semiconductor
33
Chapter 5
Interrupts
5.1 Introduction
The MCU can be interrupted six different ways:
1.
Non-maskable software interrupt instruction (SWI)
2.
External asynchronous interrupt (IRQ)
3.
Input capture interrupt (TIMER)
4.
Output compare interrupt (TIMER)
5.
Timer overflow interrupt (TIMER)
6.
Port A interrupt (if selected via mask option register)
Interrupts cause the processor to save the register contents on the stack and to set the interrupt mask (I
bit) to prevent additional interrupts. Unlike reset, hardware interrupts do not cause the current instruction
execution to be halted, but are considered pending until the current instruction is completed.
When the current instruction is completed, the processor checks all pending hardware interrupts. If
interrupts are not masked (I bit in the condition code register is clear) and the corresponding interrupt
enable bit is set, the processor proceeds with interrupt processing. Otherwise, the next instruction is
fetched and executed. The SWI is executed the same as any other instruction, regardless of the I-bit state.
When an interrupt is to be processed, the CPU puts the register contents on the stack, sets the I bit in the
CCR, and fetches the address of the corresponding interrupt service routine from the vector table at
locations $1FF8 through $1FFF. If more than one interrupt is pending when the interrupt vector is fetched,
the interrupt with the highest vector location shown in Table 5-1 will be serviced first.
An RTI instruction is used to signify when the interrupt software service routine is completed. The RTI
instruction causes the CPU state to be recovered from the stack and normal processing to resume at the
next instruction that was to be executed when the interrupt took place. Figure 5-1 shows the sequence of
events that occurs during interrupt processing.
Table 5-1. Vector Addresses for Interrupts and Reset
Register
Flag
Name
Interrupts
CPU
Interrupt
Vector
Address
N/A
Reset
RESET
$1FFE–$1FFF
N/A
Software
SWI
$1FFC–$1FFD
N/A
External Interrupt
IRQ
$1FFA–$1FFB
TSR
ICF
Timer Input Capture
TIMER
$1FF8–$1FF9
TSR
OCF
Timer Output Compare
TIMER
$1FF8–$1FF9
TSR
TOF
Timer Overflow
TIMER
$1FF8–$1FF9
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| MC68HC705P6AMDW | 8-BIT, OTPROM, 2.1 MHz, MICROCONTROLLER, PDSO28 |
| MC68HC705P6AMDWER2 | 8-BIT, OTPROM, 2.1 MHz, MICROCONTROLLER, PDSO28 |
| MC68HC705P6ASD | 8-BIT, OTPROM, 2.1 MHz, MICROCONTROLLER |
| MC68HC705P6AMDWR2 | 8-BIT, OTPROM, 2.1 MHz, MICROCONTROLLER, PDSO28 |
| MC68HC705P6ASD | 8-BIT, OTPROM, 2.1 MHz, MICROCONTROLLER |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MC68HC705P6AMDW | 功能描述:IC MCU 4.6K OTP 2.1MHZ 28-SOIC RoHS:否 類別:集成電路 (IC) >> 嵌入式 - 微控制器， 系列:HC05 標(biāo)準(zhǔn)包裝:250 系列:56F8xxx 核心處理器:56800E 芯體尺寸:16-位 速度:60MHz 連通性:CAN，SCI，SPI 外圍設(shè)備:POR，PWM，溫度傳感器，WDT 輸入/輸出數(shù):21 程序存儲器容量:40KB（20K x 16） 程序存儲器類型:閃存 EEPROM 大小:- RAM 容量:6K x 16 電壓 - 電源 (Vcc/Vdd):2.25 V ~ 3.6 V 數(shù)據(jù)轉(zhuǎn)換器:A/D 6x12b 振蕩器型:內(nèi)部 工作溫度:-40°C ~ 125°C 封裝/外殼:48-LQFP 包裝:托盤 配用:MC56F8323EVME-ND - BOARD EVALUATION MC56F8323 |
| MC68HC705P6AMP | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| MC68HC705P6CDW | 制造商:Motorola Inc 功能描述: |
| MC68HC705P6CP | 制造商:Freescale Semiconductor 功能描述: 制造商:Motorola Inc 功能描述: |
| MC68HC705P6ECDW | 制造商:Motorola Inc 功能描述: 制造商:MOTOROLA 功能描述: |
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