參數(shù)資料
型號: MC68HCL05C8AB
廠商: FREESCALE SEMICONDUCTOR INC
元件分類: 微控制器/微處理器
英文描述: 8-BIT, MROM, MICROCONTROLLER, PDIP42
封裝: PLASTIC, SDIP-42
文件頁數(shù): 70/116頁
文件大?。?/td> 781K
代理商: MC68HCL05C8AB
SCI Input/Output (I/O) Registers
MC68HC05C8A MC68HCL05C8A MC68HSC05C8A Data Sheet, Rev. 5.1
Freescale Semiconductor
57
9.5.5 Baud Rate Register
The baud rate register (BAUD) selects the baud rate for both the receiver and the transmitter.
SCP1 and SCP0 — SCI Prescaler Select Bits
These read/write bits control prescaling of the baud rate generator clock, as shown in Table 9-1.
Resets clear both SCP1 and SCP0.
SCR2–SCR0 — SCI Baud Rate Select Bits
These read/write bits select the SCI baud rate, as shown in Table 9-2. Reset has no effect on the
SCR2–SCR0 bits.
Table 9-3 shows all possible SCI baud rates derived from crystal frequencies of 2 MHz, 4 MHz, and
4.194304 MHz.
Address: $000D
Bit 7
654321
Bit 0
Read:
0
SCP1
SCP0
0
SCR2
SCR0
Write:
Reset:
00000
U
U = Unaffected
Figure 9-8. Baud Rate Register (BAUD)
Table 9-1. Baud Rate Generator Clock Prescaling
SCP0–SCP1
Baud Rate Generator Clock
00
Internal clock divided by 1
01
Internal clock divided by 3
10
Internal clock divided by 4
11
Internal clock divided by 13
Table 9-2. Baud Rate Selection
SCR2–SCR0
SCI Baud Rate (Baud)
000
Prescaled clock divided by 1
001
Prescaled clock divided by 2
010
Prescaled clock divided by 4
011
Prescaled clock divided by 8
100
Prescaled clock divided by 16
101
Prescaled clock divided by 32
110
Prescaled clock divided by 64
111
Prescaled clock divided by 128
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