參數(shù)資料
型號: MC68HCL05C8AB
廠商: FREESCALE SEMICONDUCTOR INC
元件分類: 微控制器/微處理器
英文描述: 8-BIT, MROM, MICROCONTROLLER, PDIP42
封裝: PLASTIC, SDIP-42
文件頁數(shù): 75/116頁
文件大?。?/td> 781K
代理商: MC68HCL05C8AB
Functional Description
MC68HC05C8A MC68HCL05C8A MC68HSC05C8A Data Sheet, Rev. 5.1
Freescale Semiconductor
61
10.4 Functional Description
Figure 10-2 shows a block diagram of the SPI circuitry. When a master device transmits data to a slave
via the MOSI line, the slave device responds by sending data to the master device via the master’s MISO
line. This implies full duplex transmission with both data out and data in synchronized with the same clock
signal. Thus, the byte transmitted is replaced by the byte received and eliminates the need for separate
transmit-empty and receive-full status bits. A single status bit (SPIF) is used to signify that the input/output
(I/O) operation has been completed.
Figure 10-2. Serial Peripheral Interface Block Diagram
DIVIDER
÷ 2
÷ 4 ÷ 16 ÷ 32
SELECT
8-BIT SHIFT REG
READ DATA BUFF
MSB
LSB
S
M
S
M
PIN
CONTROL
LOGIC
CLOCK
LOGIC
SPI CLOCK
MSTR
SPE
SPIE
SPE
MST
R
CPH
A
CPOL
SPR1
SPR0
SPI CONTROL REGISTER
INTERNAL
DATA BUS
SPI INTERRUPT
REQUEST
SPI STATUS REGISTER
S
PR1
S
PR0
SPI CONTROL
SP
IF
WCOL
MODF
INTERNAL
MCU CLOCK
SCK
PD4
SS
PD5
MOSI
PD3
MISO
PD2
(MASTER)
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