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參數(shù)資料
| 型號(hào)： | MC68HSC05C12AB |
| 廠商： | FREESCALE SEMICONDUCTOR INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, MROM, 4.1 MHz, MICROCONTROLLER, PDIP42 |
| 封裝： | SHRINK, PLASTIC, DIP-42 |
| 文件頁(yè)數(shù)： | 133/156頁(yè) |
| 文件大小： | 3848K |
| 代理商： | MC68HSC05C12AB |
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NON-DISCLOSURE
AGREEMENT
REQUIRED
Serial Communications Interface (SCI)
General Release Specification
MC68HC05C12A — Rev. 3.0
Serial Communications Interface (SCI)
NF — Receiver Noise Flag
This clearable, read-only bit is set when noise is detected in data
received in the SCI data register. Clear the NF bit by reading the
SCSR and then reading the SCDR. Reset clears the NF bit.
1 = Noise detected in SCDR
0 = No noise detected in SCDR
FE — Receiver Framing Error
This clearable, read-only flag is set when there is a logic zero where
a stop bit should be in the character shifted into the receive shift
register. If the received word causes both a framing error and an
overrun error, the OR bit is set and the FE bit is not set. Clear the FE
bit by reading the SCSR, and then reading the SCDR. Reset clears
the FE bit.
1 = Framing error
0 = No framing error
9.6.5 Baud Rate Register
The baud rate register selects the baud rate for both the receiver and the
transmitter.
SCP1 and SCP0 — SCI Prescaler Select Bits
These read/write bits control prescaling of the baud rate generator
clock, as shown in Table 9-1. Resets clear both SCP1 and SCP0.
Address:
$0010
Bit 7
654321
Bit 0
Read:
0
SCP1
SCP0
0
SCR2
SCR0
Write:
Reset:
00000
U
U = Unaffected
Figure 9-8. Baud Rate Register (BAUD)
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For More Information On This Product,
Go to: www.freescale.com
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