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參數(shù)資料
| 型號： | MC68HSC05C8AP |
| 廠商： | FREESCALE SEMICONDUCTOR INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, MROM, 4.1 MHz, MICROCONTROLLER, PDIP40 |
| 封裝： | PLASTIC, DIP-40 |
| 文件頁數(shù)： | 66/116頁 |
| 文件大?。?/td> | 781K |
| 代理商： | MC68HSC05C8AP |
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SCI Input/Output (I/O) Registers
MC68HC05C8A MC68HCL05C8A MC68HSC05C8A Data Sheet, Rev. 5.1
Freescale Semiconductor
53
9.5.2 SCI Control Register 1
SCI control register 1 has these functions:
Stores ninth SCI data bit received and ninth SCI data bit transmitted
Controls SCI character length
Controls SCI wakeup method
R8 — Bit 8 (Received)
When the SCI is receiving 9-bit characters, R8 is the ninth bit of the received character. R8 receives
the ninth bit from the receive shift register at the same time that the SCDR receives the other eight bits.
Reset has no effect on the R8 bit.
T8 — Bit 8 (Transmitted)
When the SCI is transmitting 9-bit characters, T8 is the ninth bit of the transmitted character. T8 is
loaded into the transmit shift register at the same time that SCDR is loaded into the transmit shift
register. Reset has no effect on the T8 bit.
M — Character Length Bit
This read/write bit determines whether SCI characters are 8 bits long or 9 bits long. The ninth bit can
be used as an extra stop bit, as a receiver wakeup signal, or as a mark or space parity bit. Reset has
no effect on the M bit.
1 = 9-bit SCI characters
0 = 8-bit SCI characters
WAKE — Wakeup Bit
This read/write bit determines which condition wakes up the SCI: a logic 1 (address mark) in the most
significant bit position of a received character or an idle condition of the PD0/RDI pin. Reset has no
effect on the WAKE bit.
1 = Address mark wakeup
0 = Idle line wakeup
Address: $000E
Bit 7
654321
Bit 0
Read:
R8
T8
0
M
WAKE
0
Write:
Reset:
Unaffected by reset
= Unimplemented
Figure 9-5. SCI Control Register 1 (SCCR1)
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