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| 型號(hào)： | MC68HSC05C8AP |
| 廠商： | FREESCALE SEMICONDUCTOR INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, MROM, 4.1 MHz, MICROCONTROLLER, PDIP40 |
| 封裝： | PLASTIC, DIP-40 |
| 文件頁(yè)數(shù)： | 79/116頁(yè) |
| 文件大小： | 781K |
| 代理商： | MC68HSC05C8AP |
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SPI Registers
MC68HC05C8A MC68HCL05C8A MC68HSC05C8A Data Sheet, Rev. 5.1
Freescale Semiconductor
65
10.5.3 Serial Peripheral Data I/O Register
The serial peripheral data I/O register is used to transmit and receive data on the serial bus. Only a write
to this register will initiate transmission/reception of another byte, and this will occur only in the master
device. At the completion of transmitting a byte of data, the SPIF status bit is set in both the master and
slave devices.
When the user reads the serial peripheral data I/O register, a buffer is actually being read. The first SPIF
must be cleared by the time a second transfer of the data from the shift register to the read buffer is
initiated or an overrun condition will exist. In cases of overrun, the byte which causes the overrun is lost.
A write to the serial peripheral data I/O register is not buffered and places data directly into the shift
register for transmission.
Address: $000C
Bit 7
654321
Bit 0
Read:
SPD7
SPD6
SPD5
SPD4
SPD3
SPD2
SPD1
SPD0
Write:
Reset
Unaffected by reset
Figure 10-6. SPI Data Register (SPSR)
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