MC68HC908EY16A MC68HC908EY8A Data Sheet, Rev. 2
Freescale Semiconductor
263
VDD + VDDA supply current
Run(4),(5)
Wait(5), (6)
Stop (LVI off) @ 25
C(7)
Stop (LVI on) @ 25
C
Stop (LVI off), –40
C to 125C
Stop (LVI on), –40
C to 125C
IDD
—
18
5.2
0.83
0.19
3.0
0.19
25
7.0
2.00
0.24
30
0.30
mA
A
mA
A
mA
I/O ports Hi-Z leakage current(8)
IIL
–10
—
+10
A
Input current – RST, OSC1
IIn
–1
—
+1
A
Capacitance
Ports (as input or output)
COut
CIn
—
12
8
pF
POR rearm voltage(9)
VPOR
750
—
mV
POR rise time ramp rate
RPOR
0.035
—
V/ms
Monitor mode entry voltage
VTST
VDD+ 3.5
9.1
V
Low-voltage inhibit reset, trip falling voltage(10)
VTRIPF
3.90
4.30
4.50
V
Low-voltage inhibit reset, trip rising voltage(11)
VTRIPR
4.00
4.40
4.60
V
Low-voltage inhibit reset/recover hysteresis(12)
VHYS
—90
—
mV
Pullup resistor — PTA0–PTA6/SS(13), IRQ, RST
RPU
24
—
48
k
Pulldown resistor — PTA0–PTA4(14)
RPD
24
36
48
k
1. VDD = 5.5 Vdc to 4.5 Vdc, VSS = 0 Vdc, TA = –40C to +125C, unless otherwise noted
2. Typical values reflect average measurements at midpoint of voltage range, 25
C only.
3. Some disturbance of the ADC accuracy is possible during any injection event and is dependent on board layout and power
supply decoupling.
4. Run (operating) IDD measured using internal oscillator at its 32-MHz rate. VDD = 5.5 Vdc. All inputs 0.2 V from rail. No dc
loads. Less than 100 pF on all outputs. All ports configured as inputs. Measured with all modules enabled.
5. All measurements taken with LVI enabled.
6. Wait IDD measured using internal oscillator at its 1-MHz rate. All inputs 0.2 V from rail; no dc loads; less than 100 pF on all
outputs. All ports configured as inputs.
7. Stop IDD is measured with no port pin sourcing current; all modules are disabled. OSCSTOPEN option is not selected.
8. Pullups and pulldowns are disabled.
9. Maximum is highest voltage that power-on reset (POR) is guaranteed.
10. These values assume the LVI is operating in 5-V mode (i.e. LVI5OR3 bit is set to 1).
11. These values assume the LVI is operating in 5-V mode (i.e. LVI5OR3 bit is set to 1).
12. These values assume the LVI is operating in 5-V mode (i.e. LVI5OR3 bit is set to 1).
13. PTA0–PTA4 pullup resistors are for interrupts only and are only enabled when the keyboard is in use.
14. Pulldown resistors available only when KBIx is enabled with KBIPx = 1.
Characteristic(1)
Symbol
Min
Typ(2)
Max
Unit