參數(shù)資料
型號: MC9328MXSCVP10R2
廠商: FREESCALE SEMICONDUCTOR INC
元件分類: 微控制器/微處理器
英文描述: 32-BIT, 100 MHz, MICROPROCESSOR, PBGA225
封裝: 13 X 13 MM, ROHS COMPLIANT, PLASTIC, MAPBGA-225
文件頁數(shù): 48/68頁
文件大?。?/td> 1335K
代理商: MC9328MXSCVP10R2
Functional Description and Application Information
MC9328MXS Technical Data, Rev. 2
52
Freescale Semiconductor
Figure 43. SDRAM Read Cycle Timing Diagram
Table 22. SDRAM Read Timing Parameter Table
Ref
No.
Parameter
1.8 ± 0.1 V
3.0 ± 0.3 V
Unit
Minimum
Maximum
Minimum
Maximum
1
SDRAM clock high-level width
2.67
4
ns
2
SDRAM clock low-level width
6
–4–
ns
3
SDRAM clock cycle time
11.4
10
ns
3S
CS, RAS, CAS, WE, DQM setup time
3.42
3
ns
3H
CS, RAS, CAS, WE, DQM hold time
2.28
2
ns
4S
Address setup time
3.42
3
ns
4H
Address hold time
2.28
2
ns
5
SDRAM access time (CL = 3)
6.84
6
ns
SDCLK
CS
CAS
WE
ADDR
DQ
DQM
ROW/BA
COL/BA
3S
3H
3S
3H
3S
3S
3H
4S
4H
5
3S
3
2
1
8
Data
7
6
Note:
CKE is high during the read/write cycle.
RAS
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