參數(shù)資料
型號: MC9328MXSCVP10R2
廠商: FREESCALE SEMICONDUCTOR INC
元件分類: 微控制器/微處理器
英文描述: 32-BIT, 100 MHz, MICROPROCESSOR, PBGA225
封裝: 13 X 13 MM, ROHS COMPLIANT, PLASTIC, MAPBGA-225
文件頁數(shù): 7/68頁
文件大?。?/td> 1335K
代理商: MC9328MXSCVP10R2
Functional Description and Application Information
MC9328MXS Technical Data, Rev. 2
Freescale Semiconductor
15
4.4
External Interface Module
The External Interface Module (EIM) handles the interface to devices external to the i.MXS processor,
including the generation of chip-selects for external peripherals and memory. The timing diagram for the
EIM is shown in Figure 5, and Table 11 defines the parameters of signals.
Table 10. Reset Module Timing Parameter Table
Ref
No.
Parameter
1.8 ± 0.1 V
3.0 ± 0.3 V
Unit
Min
Max
Min
Max
1
Width of input POWER_ON_RESET
note1
1 POR width is dependent on the 32 or 32.768 kHz crystal oscillator start-up time. Design margin should allow for crystal
tolerance, i.MX chip variations, temperature impact, and supply voltage influence. Through the process of supplying crystals
for use with CMOS oscillators, crystal manufacturers have developed a working knowledge of start-up time of their crystals.
Typically, start-up times range from 400 ms to 1.2 seconds for this type of crystal.
If an external stable clock source (already running) is used instead of a crystal, the width of POR should be ignored in
calculating timing for the start-up process.
note1
––
2
Width of internal POWER_ON_RESET
(CLK32 at 32 kHz)
300
ms
3
7K to 32K-cycle stretcher for SDRAM reset
7
Cycles of
CLK32
4
14K to 32K-cycle stretcher for internal system reset
HRESERT and output reset at pin RESET_OUT
14
Cycles of
CLK32
5
Width of external hard-reset RESET_IN
4
4
Cycles of
CLK32
6
4K to 32K-cycle qualifier
4
Cycles of
CLK32
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