參數(shù)資料
型號(hào): MCF5480
廠商: 飛思卡爾半導(dǎo)體(中國(guó))有限公司
英文描述: MCF548x ColdFire㈢ Microprocessor
中文描述: MCF548x微處理器的ColdFire㈢
文件頁(yè)數(shù): 9/34頁(yè)
文件大小: 403K
代理商: MCF5480
Hardware Design Considerations
MCF548x ColdFire
Microprocessor, Rev. 4
Freescale Semiconductor
9
4.4
USB Power Filtering
To minimize noise, an external filter is required for each of the USB power pins. The filter shown in
Figure 6
should be
connected between the board EV
DD
or IV
DD
and each of the USB V
DD
pins.
The resistor and capacitors should be placed as close to the dedicated USB V
DD
pin as possible.
A separate filter circuit should be included for each USB V
DD
pin, a total of five circuits.
All traces should be as low impedance as possible, especially ground pins to the ground plane.
The filter for USB_PHYVDD to VSS should be connected to the power and ground planes, respectively, not fingers
of the planes.
In addition to keeping the filter components for the USB_PLLVDD as close as practical to the body of the processor
as previously mentioned, special care should be taken to avoid coupling switching power supply noise or digital
switching noise onto the portion of that supply between the filter and the processor.
The capacitors for C2 in the table below should be rated X5R or better due to temperature performance.
Figure 6. USB V
DD
Power Filter
NOTE
In addition to the above filter circuitry, a 0.01 F capacitor is also recommended in parallel
with those shown.
Table 5
lists the resistor values and supply voltages to be used in the circuit for each of the USB V
DD
pins.
Table 5. USB Filter Circuit Values
USB V
DD
Pin
Nominal Voltage
R1 (
Ω
)
C1 (
μ
F)
C2 (
μ
F)
USBVDD
(Bias generator supply)
3.3V
10
10
0.1
USB_PHYVDD
(Main transceiver supply)
3.3V
0
10
0.1
USB_PLLVDD
(PLL supply)
1.5V
10
1
0.1
USB_OSCVDD
(Oscillator supply)
3.3V
0
10
0.1
USB_OSCAVDD
(Oscillator analog supply)
1.5V
0
10
0.1
Board EV
DD
/IV
DD
R1
C2
USB V
DD
Pin
C1
GND
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