參數(shù)資料
型號(hào): MCIMX257CJM4
廠商: Freescale Semiconductor
文件頁數(shù): 122/153頁
文件大?。?/td> 0K
描述: MPU IMX25 IND 400-MAPBGA
特色產(chǎn)品: MCIMX25 Applications Processors
標(biāo)準(zhǔn)包裝: 90
系列: i.MX25
核心處理器: ARM9
芯體尺寸: 32-位
速度: 400MHz
連通性: 1 線,CAN,EBI/EMI,以太網(wǎng),I²C,MMC,智能卡,SPI,SSI,UART/USART,USB OTG
外圍設(shè)備: DMA,I²S,LCD,POR,PWM,WDT
輸入/輸出數(shù): 128
程序存儲(chǔ)器類型: 外部程序存儲(chǔ)器
RAM 容量: 144K x 8
電壓 - 電源 (Vcc/Vdd): 1.15 V ~ 1.52 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 3x12b
振蕩器型: 外部
工作溫度: -40°C ~ 85°C
封裝/外殼: 400-LFBGA
包裝: 托盤
i.MX25 Applications Processor for Consumer and Industrial Products, Rev. 10
70
Freescale Semiconductor
NOTE
The test condition load capacitance was 25 pF. Recommended drive
strength for all controls, address, and BCLK is maximum drive.
Recommended drive strength for all controls, address and BCLK is
maximum drive.
WE8
Clock rise/fall to RW valid
8
12
ns
WE9
Clock rise/fall to RW invalid
3
8
ns
WE10
Clock rise/fall to OE valid
7
12
ns
WE11
Clock rise/fall to OE invalid
3.6
5.5
ns
WE12
Clock rise/fall to EB[y] valid
6
11.5
ns
WE13
Clock rise/fall to EB[y] invalid
6
10
ns
WE14
Clock rise/fall to LBA valid
17.5
20
ns
WE15
Clock rise/fall to LBA invalid
0
1
ns
WE16
Clock rise/fall to output data valid
5
10
ns
WE17
Clock rise to output data invalid
0
2.5
ns
WE18
Input data valid to clock rise, FCE=1
1
ns
WE19
Input Data Valid to Clock rise, FCE=0 (in the case there is ECB asserted during
access)
1/2 BCLK
+2.63
—ns
Input Data Valid to Clock rise, FCE=0 (in the case there is NO ECB asserted
during access)
6.9
ns
WE20
Clock rise to input data invalid, FCE=1
1
ns
WE21
Clock rise to input data invalid, FCE=0
2.4
ns
WE22
ECB setup time, FCE=1
5
ns
WE23
ECB setup time, FCE=0
7.2
ns
WE24
ECB hold time, FCE=1
5
ns
WE25
ECB hold time, FCE=0
0
ns
WE26
DTACK setup time
5.4
ns
WE27
DTACK hold time
–3.2
ns
1 High is defined as 80% of signal value; low is defined as 20% of signal value.
2 BCLK parameters are being measured from the 50% point. For example, high is defined as 50% of signal value and low is
defined as 50% as signal value.
Table 56. WEIM Bus Timing Parameters1 (continued)
ID
Parameter
Min.
Max.
Unit
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