參數(shù)資料
型號： MCIMX27VOP4
廠商： FREESCALE SEMICONDUCTOR INC
元件分類： 微控制器/微處理器
英文描述： 32-BIT, 400 MHz, MICROPROCESSOR, PBGA404
封裝： 17 X 17 MM, 0.65 MM PITCH, LEAD FEE, MAPBGA-404
文件頁數(shù)： 65/118頁
文件大?。?/td> 1159K
代理商： MCIMX27VOP4
i.MX27 Data Sheet, Advance Information, Rev. 0.1
50
Preliminary—Subject to Change Without Notice
Freescale Semiconductor
Signal Descriptions
3.5.3.1
General Timing Requirements
These are the general timing requirements for the ATA interface signals.
NOTE: SRISE and SFALL meets this requirement when measured at the sender’s connector from 10–90% of full signal
amplitude with all capacitive loads from 15 pf through 40 pf where all signals have the same capacitive load value.
Figure 8. ATA interface Signals Timing Diagram
3.5.4
Digital Audio Mux (AUDMUX)
The AUDMUX provides a programmable interconnect logic for voice, audio and data routing between
internal serial interfaces (SSI, SAP) and external serial interfaces (audio and voice codecs). The AC timing
of AUDMUX external pins is hence governed by SSI and SAP modules. Please refer to their respective
electrical specifications.
3.5.5
CMOS Sensor Interface (CSI)
This section describes the electrical information (AC timing) of the CSI.
3.5.5.1
Gated Clock Mode Timing
VSYNC, HSYNC, and PIXCLK signals are used in this mode. A frame starts with a rising/falling edge on
VSYNC, then HSYNC goes high and holds for the entire line. The pixel clock is valid as long as HSYNC
is high. Figure 9 and Figure 10 depict the gated clock mode timings of CSI, and Table 20 lists the timing
parameters.
Table 19. AC Characteristics of All Interface Signals
ID
Parameter
Symbol
Min
Max
Unit
SI1
Rising edge slew rate for any signal on ATA
interface (see note)
Srise
—
1.25
V/ns
SI2
Falling edge slew rate for any signal on ATA
interface (see note)
Sfall
—
1.25
V/ns
SI3
Host interface signal capacitance at the host
connector
Chost
—20
pF
ATA Interface Signals
SI1
SI2
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
MCIMX27VOP4A 功能描述:處理器 - 專門應用 I.MX27 REV 2.1 RoHS:否 制造商:Freescale Semiconductor 類型:Multimedia Applications 核心:ARM Cortex A9 處理器系列:i.MX6 數(shù)據(jù)總線寬度:32 bit 最大時鐘頻率:1 GHz 指令/數(shù)據(jù)緩存: 數(shù)據(jù) RAM 大小:128 KB 數(shù)據(jù) ROM 大小: 工作電源電壓: 最大工作溫度:+ 95 C 安裝風格:SMD/SMT 封裝 / 箱體:MAPBGA-432
MCIMX27VOP4AR2 功能描述:處理器 - 專門應用 I.MX27 REV 2.1 RoHS:否 制造商:Freescale Semiconductor 類型:Multimedia Applications 核心:ARM Cortex A9 處理器系列:i.MX6 數(shù)據(jù)總線寬度:32 bit 最大時鐘頻率:1 GHz 指令/數(shù)據(jù)緩存: 數(shù)據(jù) RAM 大小:128 KB 數(shù)據(jù) ROM 大小: 工作電源電壓: 最大工作溫度:+ 95 C 安裝風格:SMD/SMT 封裝 / 箱體:MAPBGA-432
MCIMX27VOP4R2 制造商:Freescale Semiconductor 功能描述:MULTIMEDIA PROCESSOR 404-PIN MA-BGA T/R - Tape and Reel
MCIMX27WPDK 功能描述:開發(fā)板和工具包 - ARM MCIMX27 PDK For WINCE RoHS:否 制造商:Arduino 產(chǎn)品:Development Boards 工具用于評估:ATSAM3X8EA-AU 核心:ARM Cortex M3 接口類型:DAC, ICSP, JTAG, UART, USB 工作電源電壓:3.3 V
MCIMX280CVM4B 功能描述:處理器 - 專門應用 Catskills Rev1.2 RoHS:否 制造商:Freescale Semiconductor 類型:Multimedia Applications 核心:ARM Cortex A9 處理器系列:i.MX6 數(shù)據(jù)總線寬度:32 bit 最大時鐘頻率:1 GHz 指令/數(shù)據(jù)緩存: 數(shù)據(jù) RAM 大小:128 KB 數(shù)據(jù) ROM 大小: 工作電源電壓: 最大工作溫度:+ 95 C 安裝風格:SMD/SMT 封裝 / 箱體:MAPBGA-432
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