參數(shù)資料
型號： MCIMX31LDVKN5D
廠商： FREESCALE SEMICONDUCTOR INC
元件分類： 微控制器/微處理器
英文描述： 32-BIT, 532 MHz, MICROPROCESSOR, PBGA457
封裝： 14 X 14 MM, 0.50 MM PITCH, ROHS COMPLIANT, PLASTIC, MAPBGA-457
文件頁數(shù)： 99/118頁
文件大小： 1083K
代理商： MCIMX31LDVKN5D
Electrical Characteristics
MCIMX31/MCIMX31L Technical Data, Rev. 4.3
Freescale Semiconductor
81
IP56 Controls setup time for write
Tdcsw
Tdicuw–1.5
Tdicuw
—
ns
IP57 Controls hold time for write
Tdchw
Tdicpw–Tdicdw–1.5
Tdicpw–Tdicdw
—
ns
IP58 Slave device data delay8
Tracc
0
—
Tdrp9–Tlbd10–Tdicur–1.5
ns
IP59 Slave device data hold time8
Troh
Tdrp–Tlbd–Tdicdr+1.5
—
Tdicpr–Tdicdr–1.5
ns
IP60 Write data setup time
Tds
Tdicdw–1.5
Tdicdw
—
ns
IP61 Write data hold time
Tdh
Tdicpw–Tdicdw–1.5
Tdicpw–Tdicdw
—
ns
IP62 Read period2
Tdicpr
Tdicpr–1.5
Tdicpr
Tdicpr+1.5
ns
IP63 Write period3
Tdicpw
Tdicpw–1.5
Tdicpw
Tdicpw+1.5
ns
IP64 Read down time4
Tdicdr
Tdicdr–1.5
Tdicdr
Tdicdr+1.5
ns
IP65 Read up time5
Tdicur
Tdicur–1.5
Tdicur
Tdicur+1.5
ns
IP66 Write down time6
Tdicdw
Tdicdw–1.5
Tdicdw
Tdicdw+1.5
ns
IP67 Write up time7
Tdicuw
Tdicuw–1.5
Tdicuw
Tdicuw+1.5
ns
IP68 Read time point9
Tdrp
Tdrp–1.5
Tdrp
Tdrp+1.5
ns
1 The exact conditions have not been finalized, but will likely match the current customer requirement for their specific display. These
conditions may be device specific.
2 Display interface clock period value for read:
3 Display interface clock period value for write:
4 Display interface clock down time for read:
5 Display interface clock up time for read:
6 Display interface clock down time for write:
7 Display interface clock up time for write:
8 This parameter is a requirement to the display connected to the IPU.
9 Data read point:
10 Loopback delay Tlbd is the cumulative propagation delay of read controls and read data. It includes an IPU output delay, a
device-level output delay, board delays, a device-level input delay, an IPU input delay. This value is device specific.
Table 50. Asynchronous Serial Interface Timing Parameters—Access Level (continued)
ID
Parameter
Symbol
Min.
Typ.1
Max.
Units
Tdicpr
T
HSP_CLK
ceil
DISP#_IF_CLK_PER_RD
HSP_CLK_PERIOD
----------------------------------------------------------------
=
Tdi cpw
T
HSP_CLK
ce il
DISP#_IF_CLK_PER_WR
HSP_CLK_PERIOD
------------------------------------------------------------------
=
Tdicdr
1
2
--- T
HSP_CLK
cei l
2 DISP#_IF_CLK_DOWN_RD
HSP_CLK_PERIOD
-------------------------------------------------------------------------------
=
Tdi cur
1
2
--- T
HSP_CLK
cei l
2 DISP#_IF_CLK_UP_RD
HSP_CLK_PERIOD
--------------------------------------------------------------------
=
Tdi cdw
1
2
--- T
HSP_CLK
cei l
2 DISP#_IF_CLK_DOWN_WR
HSP_CLK_PERIOD
---------------------------------------------------------------------------------
=
Tdi cuw
1
2
--- T
HSP_CLK
ce il
2 DISP#_IF_CLK_UP_WR
HSP_CLK_PERIOD
----------------------------------------------------------------------
=
Tdrp
T
HSP_CLK
cei l
DISP#_READ_EN
HSP_CLK_PERIOD
--------------------------------------------------
=
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