
i.MX35 Applications Processors for Automotive Products, Rev. 10
Freescale Semiconductor
96
Figure 69. Transfer Operation Timing Diagram (Parallel)
NOTE
The memory stick host controller is designed to meet the timing
requirements per Sony's Memory Stick Pro Format Specifications. Tables in
this section detail the specifications’ requirements for parallel and serial
modes, and not the i.MX35 timing.
Table 60. Serial Interface Timing Parameters1
Signal
Parameter
Symbol
Standards
Unit
Min.
Max.
MSHC_SCLK
Cycle
tSCLKc
50
—
ns
H pulse length
tSCLKwh
15
—
ns
L pulse length
tSCLKwl
15
—
ns
Rise time
tSCLKr
—
10
ns
Fall time
tSCLKf
—
10
ns
MSHC_BS
Setup time
tBSsu
5
—
ns
Hold time
tBSh
5
—
ns
tSCLKc
MSHC_SCLK
tBSsu
tBSh
tDsu
tDh
MSHC_BS
MSHC_DATA
(Output)
tDd
MSHC_DATA
(Input)