DAC INPUT CODE VS. ANALOG OUTPUT (V
參數(shù)資料
型號: MCP4716A0T-E/MAY
廠商: Microchip Technology
文件頁數(shù): 33/86頁
文件大?。?/td> 0K
描述: IC DAC 10BIT NV EEP I2C 6DFN
標(biāo)準(zhǔn)包裝: 1
設(shè)置時間: 6µs
位數(shù): 10
數(shù)據(jù)接口: EEPROM,I²C,串行
轉(zhuǎn)換器數(shù)目: 1
電壓電源: 單電源
功率耗散(最大): 1.10W
工作溫度: -40°C ~ 125°C
安裝類型: 表面貼裝
封裝/外殼: 6-VDFN 裸露焊盤
供應(yīng)商設(shè)備封裝: 6-DFN(2x2)
包裝: 標(biāo)準(zhǔn)包裝
輸出數(shù)目和類型: 1 電壓,單極
采樣率(每秒): *
其它名稱: MCP4716A0T-E/MAYDKR
2011-2012 Microchip Technology Inc.
DS22272C-page 39
MCP4706/4716/4726
TABLE 4-1:
DAC INPUT CODE VS. ANALOG OUTPUT (VOUT) (VDD = 5.0V)
Device
Volatile DAC
Register Value
VRL
LSb
Gain
Selection
VOUT
Equation
uV
Equation
V
MCP4726
(12-bit)
1111 1111 1111
5.0V
5.0V/4096
1,220.7
1x
VRL * (4095/4096) * 1
4.998779
2.5V
2.5V/4096
610.4
1x
VRL * (4095/4096) * 1
2.499390
2x(3)
VRL * (4095/4096) * 2)
4.998779
0111 1111 1111
5.0V
5.0V/4096
1,220.7
1x
VRL * (2047/4096) * 1)
2.498779
2.5V
2.5V/4096
610.4
1x
VRL * (2047/4096) * 1)
1.249390
2x(3)
VRL * (2047/4096) * 2)
2.498779
0011 1111 1111
5.0V
5.0V/4096
1,220.7
1x
VRL * (1023/4096) * 1)
1.248779
2.5V
2.5V/4096
610.4
1x
VRL * (1023/4096) * 1)
0.624390
2x(3)
VRL * (1023/4096) * 2)
1.248779
0000 0000 0000
5.0V
5.0V/4096
1,220.7
1x
VRL * (0/4096) * 1)
0
2.5V
2.5V/4096
610.4
1x
VRL * (0/4096) * 1)
0
2x(3)
VRL * (0/4096) * 2)
0
MCP4716
(10-bit)
11 1111 1111
5.0V
5.0V/1024
4,882.8
1x
VRL * (1023/1024) * 1
4.995117
2.5V
2.5V/1024
2,441.4
1x
VRL * (1023/1024) * 1
2.497559
2x(3)
VRL * (1023/1024) * 2
4.995117
01 1111 1111
5.0V
5.0V/1024
4,882.8
1x
VRL * (511/1024) * 1
2.495117
2.5V
2.5V/1024
2,441.4
1x
VRL * (511/1024) * 1
1.247559
2x(3)
VRL * (511/1024) * 2
2.495117
00 1111 1111
5.0V
5.0V/1024
4,882.8
1x
VRL * (255/1024) * 1
1.245117
2.5V
2.5V/1024
2,441.4
1x
VRL * (255/1024) * 1
0.622559
2x(3)
VRL * (255/1024) * 2
1.245117
00 0000 0000
5.0V
5.0V/1024
4,882.8
1x
VRL * (0/1024) * 1
0
2.5V
2.5V/1024
2,441.4
1x
VRL * (0/1024) * 1
0
2x(3)
VRL * (0/1024) * 1
0
MCP4706
(8-bit)
1111 1111
5.0V
5.0V/256
19,531.3
1x
VRL * (255/256) * 1
4.980469
2.5V
2.5V/256
9,765.6
1x
VRL * (255/256) * 1
2.490234
2x(3)
VRL * (255/256) * 2
4.980469
0111 1111
5.0V
5.0V/256
19,531.3
1x
VRL * (127/256) * 1
2.480469
2.5V
2.5V/256
9,765.6
1x
VRL * (127/256) * 1
1.240234
2x(3)
VRL * (127/256) * 2
2.480469
0011 1111
5.0V
5.0V/256
19,531.3
1x
VRL * (63/256) * 1
1.230469
2.5V
2.5V/256
9,765.6
1x
VRL * (63/256) * 1
0.615234
2x(3)
VRL * (63/256) * 2
1.230469
0000 0000
5.0V
5.0V/256
19,531.3
1x
VRL * (0/256) * 1
0
2.5V
2.5V/256
9,765.6
1x
VRL * (0/256) * 1
0
2x(3)
VRL * (0/256) * 2
0
Note 1:
VRL is the resistor ladder’s reference voltage. It is independent of VREF1:VREF0 selection.
2:
Gain selection of 2x requires voltage reference source to come from VREF pin and
requires VREF pin voltage ≤ VDD / 2.
3:
Requires G = 1, VREF1:VREF0 = 10 or ‘11’, and VRL ≤ VDD/2.
4:
These theoretical calculations do not take into account the Offset and Gain errors.
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