參數(shù)資料
型號： MCP4725A0T-E/CH
廠商： Microchip Technology
文件頁數(shù)： 18/50頁
文件大?。?/td> 0K
描述： IC DAC 12BIT W/I2C SOT23A-6
標(biāo)準(zhǔn)包裝： 1
設(shè)置時間： 6µs
位數(shù)： 12
數(shù)據(jù)接口： EEPROM，I²C，串行
轉(zhuǎn)換器數(shù)目： 1
電壓電源： 單電源
工作溫度： -40°C ~ 125°C
安裝類型： 表面貼裝
封裝/外殼： SOT-23-6
供應(yīng)商設(shè)備封裝： SOT-23-6
包裝： 標(biāo)準(zhǔn)包裝
輸出數(shù)目和類型： 1 電壓，單極；1 電壓，雙極
采樣率（每秒）： *
產(chǎn)品目錄頁面： 673 (CN2011-ZH PDF)
配用： MCP4725DM-PTPLS-ND - BOARD DAUGHTER PICTAIL MCP4725
其它名稱： MCP4725A0T-E/CHDKR
MCP4725AOT-E/CHDKR
MCP4725AOT-E/CHDKR-ND
2009 Microchip Technology Inc.
DS22039D-page 25
MCP4725
FIGURE 6-2:
Write Commands for DAC Input Register and EEPROM.
(A) Write DAC Register: (C2, C1, C0) = (0,1,0) or
(B) Write DAC Register and EEPROM: (C2, C1, C0) = (0,1,1)
1st byte (Device Addressing)
ACK (MCP4725)
2nd byte
3rd byte
ACK (MCP4725)
4th byte
D3 D2
D0
D1
1
0
0 A2 A1 A0 0
C2 C1 C0 X
X PD1 PD0
X
X X X X
D11 D10 D9 D8 D7 D6 D5 D4
START Bit
DAC Register Data (12 bits)
STOP Bit
Power Down Selection
Unused
Device Code Address Bits R/W
Write Command Type:
Write DAC Register: (C2 = 0, C1 = 1, C0 = 0)
Write DAC Register and EEPROM: (C2 = 0, C1 = 1, C0 = 1). See Note 1
The device updates the VOUT after this ACK pulse is issued.
For EEPROM Write:
- The Charge Pump initiates the EEPROM writing sequence at the falling edge of this ACK pulse.
- The RDY/BSY bit (pin) goes “l(fā)ow” at the falling edge of this ACK pulse and back to “high” immediately after
the EEPROM write is completed.
ACK (MCP4725)
2nd byte
3rd byte
ACK (MCP4725)
4th byte
D3 D2
D0
D1
C2 C1 C0 X
X PD1 PD0 X
X X X X
D11 D10 D9 D8 D7 D6 D5 D4
STOP
Bit
Repeat Bytes of 2nd - 4th bytes
Note 1: RDY/BSY bit stays “l(fā)ow” during the EEPROM write. Any new write command including repeat bytes during the
EEPROM write mode is ignored.
The RDY/BSY bit sets to “high” after the EEPROM write is completed.
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