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| 型號： | MCP4725A0T-E/CH |
| 廠商： | Microchip Technology |
| 文件頁數(shù)： | 27/50頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC DAC 12BIT W/I2C SOT23A-6 |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 設(shè)置時間： | 6µs |
| 位數(shù)： | 12 |
| 數(shù)據(jù)接口： | EEPROM，I²C，串行 |
| 轉(zhuǎn)換器數(shù)目： | 1 |
| 電壓電源： | 單電源 |
| 工作溫度： | -40°C ~ 125°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | SOT-23-6 |
| 供應(yīng)商設(shè)備封裝： | SOT-23-6 |
| 包裝： | 標(biāo)準(zhǔn)包裝 |
| 輸出數(shù)目和類型： | 1 電壓，單極；1 電壓，雙極 |
| 采樣率（每秒）： | * |
| 產(chǎn)品目錄頁面： | 673 (CN2011-ZH PDF) |
| 配用： | MCP4725DM-PTPLS-ND - BOARD DAUGHTER PICTAIL MCP4725 |
| 其它名稱： | MCP4725A0T-E/CHDKR MCP4725AOT-E/CHDKR MCP4725AOT-E/CHDKR-ND |
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2009 Microchip Technology Inc.
DS22039D-page 33
MCP4725
8.0
TYPICAL APPLICATIONS
The MCP4725 device is one of Microchip’s latest DAC
device family with non-volatile EEPROM memory. The
device is a general purpose resistive string DAC
intended to be used in applications where a precision,
and low power DAC with moderate bandwidth is
required.
Since the device includes non-volatile EEPROM
memory, the user can use this device for applications
that require the output to return to the previous set-up
value on subsequent power-ups.
Applications generally suited for the MCP4725 device
family include:
Set Point or Offset Trimming
Sensor Calibration
Portable Instrumentation (Battery Powered)
Motor Speed Control
8.1
Connecting to I2C BUS using
Pull-Up Resistors
The SCL and SDA pins of the MCP4725 are open-drain
configurations. These pins require a pull-up resistor as
shown in Figure 8-1. The value of these pull-up
resistors depends on the operating speed (standard,
fast, and high speed) and loading capacitance of the
I2C bus line. Higher value of pull-up resistor consumes
less power, but increases the signal transition time
(higher RC time constant) on the bus. Therefore, it can
limit the bus operating speed. The lower resistor value,
on the other hand, consumes higher power, but allows
higher operating speed. If the bus line has higher
capacitance due to long bus line or high number of
devices connected to the bus, a smaller pull-up resistor
is needed to compensate the long RC time constant.
The pull-up resistor is typically chosen between 1 k
and 10 k ranges for standard and fast modes, and
less than 1 k for high speed mode.
FIGURE 8-1:
I2C Bus Interface
Connection with A0 pin tied to VSS.
Two devices with the same A2 and A1 address bits can
be connected to the same I2C bus by utilizing the A0
address pin (Example: A0 pin of device A is tied to VDD,
and the other device’s pin is tied to VSS).
8.1.1
DEVICE CONNECTION TEST
The user can test the presence of the MCP4725 on the
I2C bus line without performing the data conversion.
This test can be achieved by checking an acknowledge
response from the MCP4725 after sending a read or
write command. Here is an example using Figure 8-2:
(a) Set the R/W bit “HIGH” in the address byte.
(b) If the MCP4725 is connected to the I2C bus line, it
will then acknowledge by pulling SDA bus LOW
during the ACK clock and then release the bus
back to the I2C Master.
(c) A STOP or repeated START bit can then be issued
from the Master and I2C communication can
continue.
FIGURE 8-2:
I2C Bus Connection Test.
MCP4725
VOUT A0
SCL
VSS
1
2
3
4
5
6
VDD SDA
10 F
0.1 F
R
Analog
VDD
To MCU
(MASTER)
Output
Note 1: R is the pull-up resistor. Typically
1 ~ 10 k
2: A0 can be tied to VSS, VDD or driven by
MCU
12 3 4
5 6 7
8
9
SCL
SDA
11 0
0A2 A1 A0 1
START
Bit
Address Byte
Address bits
Device bits
R/W
START
Bit
MCP4725
ACK
Response
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