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參數(shù)資料
| 型號： | MCP4726A0T-E/MAY |
| 廠商： | Microchip Technology |
| 文件頁數(shù)： | 1/86頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC DAC 12BIT NV EEP I2C 6DFN |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 設(shè)置時間： | 6µs |
| 位數(shù)： | 12 |
| 數(shù)據(jù)接口： | EEPROM，I²C，串行 |
| 轉(zhuǎn)換器數(shù)目： | 1 |
| 電壓電源： | 單電源 |
| 功率耗散（最大）： | 1.10W |
| 工作溫度： | -40°C ~ 125°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 6-VDFN 裸露焊盤 |
| 供應(yīng)商設(shè)備封裝： | 6-DFN（2x2） |
| 包裝： | 標(biāo)準(zhǔn)包裝 |
| 輸出數(shù)目和類型： | 1 電壓，單極 |
| 采樣率（每秒）： | * |
| 其它名稱： | MCP4726A0T-E/MAYDKR |
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2011-2012 Microchip Technology Inc.
DS22272C-page 1
MCP4706/4716/4726
Features:
Output Voltage Resolutions:
- 12-bit: MCP4726
- 10-bit: MCP4716
-8-bit: MCP4706
Rail-to-Rail Output
Fast Settling Time of 6 s (typical)
DAC Voltage Reference Options:
-VDD
-VREF Pin
Output Gain Options:
- Unity (1x)
- 2x, only when VREF pin is used as voltage
source
Nonvolatile Memory (EEPROM):
- Auto Recall of Saved DAC register setting
- Auto Recall of Saved Device Configuration
(Voltage Reference, Gain, Power-Down)
Power-Down modes:
- Disconnects output buffer
- Selection of VOUT pull-down resistors
(640 k
Ω, 125 kΩ, or 1 kΩ)
Low-Power Consumption:
- Normal Operation: 210 A typical
- Power-Down Operation: 60 nA typical
(PD1:PD0 = 11)
Single-Supply Operation: 2.7V to 5.5V
I2C Interface:
- Eight Available Addresses
- Standard (100 kbps), Fast (400 kbps), and
High-Speed (3.4 Mbps) modes
Small 6-lead SOT-23 and DFN (2x2) Packages
Extended Temperature Range: -40°C to +125°C
Applications:
Set Point or Offset Trimming
Sensor Calibration
Low-Power Portable Instrumentation
PC Peripherals
Data Acquisition Systems
Motor Control
Package Types
Description:
The MCP4706/4716/4726 are single channel 8-bit,
10-bit, and 12-bit buffered voltage output Digital-to-
Analog Converters (DAC) with nonvolatile memory and
an I2C serial interface. This family will also be referred
to as MCP47X6.
The VREF pin or the device VDD can be selected as the
DAC’s reference voltage. When VDD is selected, VDD is
connected internally to the DAC reference circuit.
When the VREF pin is used, the user can select the
output buffer’s gain to 1 or 2. When the gain is 2, the
VREF pin voltage should be limited to a maximum of
VDD/2.
The DAC register value and Configuration bits can be
programmed to nonvolatile memory (EEPROM). The
nonvolatile memory holds the DAC register and
Configuration bit values when the device is powered
off. A device Reset (such as a Power-on Reset) latches
these stored values into the volatile memory.
Power-Down modes enable system current reduction
when the DAC output voltage is not required. The VOUT
pin can be configured to present a low, medium, or high
resistance load.
These devices have a two-wire I2C compatible serial
interface for standard (100 kHz), fast (400 kHz), or
High-Speed (3.4 MHz) mode.
These devices are available in small 6-pin SOT-23 and
DFN 2x2 mm packages.
1
2
3
4
5
6
VOUT
SCL
SDA
VSS
SOT-23-6
VDD
MCP4706/16/26
2x2 DFN-6*
SCL
SDA
VSS
1
2
3
6
5
4
VOUT
EP
7
VDD
* Includes Exposed Thermal Pad (EP); see Table 3-1.
VREF
8-/10-/12-Bit Voltage Output Digital-to-Analog Converter
with EEPROM and I2C Interface
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