參數(shù)資料
型號: MCP639T-E/ML
廠商: Microchip Technology
文件頁數(shù): 11/62頁
文件大小: 0K
描述: IC OP AMP QUAD 24MHZ 16-QFN
標準包裝: 3,300
放大器類型: 通用
電路數(shù): 4
輸出類型: 滿擺幅
轉換速率: 10 V/µs
增益帶寬積: 24MHz
電流 - 輸入偏壓: 4pA
電壓 - 輸入偏移: 1800µV
電流 - 電源: 2.5mA
電流 - 輸出 / 通道: 70mA
電壓 - 電源,單路/雙路(±): 2.5 V ~ 5.5 V
工作溫度: -40°C ~ 125°C
安裝類型: 表面貼裝
封裝/外殼: 16-VQFN 裸露焊盤
供應商設備封裝: 16-QFN(4x4)
包裝: 帶卷 (TR)
2009-2011 Microchip Technology Inc.
DS22197B-page 19
MCP631/2/3/4/5/9
3.0
PIN DESCRIPTIONS
Descriptions of the pins are listed in Table 3-1.
TABLE 3-1:
PIN FUNCTION TABLE
3.1
Analog Outputs
The analog output pins (VOUT) are low-impedance
voltage sources.
3.2
Analog Inputs
The non-inverting and inverting inputs (VIN+, VIN-, …)
are high-impedance CMOS inputs with low bias
currents.
3.3
Power Supply Pins
The positive power supply (VDD) is 2.5V to 5.5V higher
than the negative power supply (VSS). For normal
operation, the other pins are between VSS and VDD.
Typically, these parts are used in a single (positive)
supply configuration. In that case, VSS is connected to
ground and VDD is connected to the supply. VDD will
need bypass capacitors.
MCP
6
31
MCP
6
32
MCP
6
33
MCP
6
34
MCP
6
35
MCP
6
39
Symb
ol
Description
SOIC SOT TDFN SOIC DFN SOIC SOT SOIC TSSOP MSOP DFN QFN
61
6
1
16
1
16
VOUT,
VOUTA
Output (op amp A)
24
2
22
4
2
1
VIN-,
VINA-
Inverting Input (op amp A)
33
3
33
3
2
VIN+,
VINA+
Non-inverting Input (op
amp A)
42
4
44
2
11
4
11
VSS
Negative Power Supply
——
8
5
5
CS, CSA Chip Select Digital Input
(op amp A)
——
6
CSB
Chip Select Digital Input
(op amp B)
——
5
5
7
4
VINB+
Non-inverting Input (op
amp B)
——
6
6
8
5
VINB-
Inverting Input (op amp B)
——
7
7
9
6
VOUTB Output (op amp B)
75
7
8
87
6
4
10
3
VDD
Positive Power Supply
——
7
CSBC
Chip Select Digital Input
(op amp B and C)
——
8
8
VOUTC Output (op amp C)
——
9
9
VINC-
Inverting Input (op amp C)
——
10
10
VINC+ Non-Inverting Input (op
amp C)
——
12
12
VIND+ Non-inverting Input (op
amp D)
——
13
13
VIND-
Inverting Input (op amp D)
——
14
14
VOUTD Output (op amp D)
——
15
CSAD
Chip Select Digital Input
(op amp A and D)
1,5,
8
—1, 5,
8
1,5
NC
No Internal Connection
9
11
17
EP
Exposed Thermal Pad
(EP); must be connected to
VSS
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