參數(shù)資料
型號(hào)： MCV14ATI/SL
元件分類： 微控制器/微處理器
英文描述： 8-BIT, FLASH, 20 MHz, RISC MICROCONTROLLER, PDSO14
封裝： 3.90 MM, PLASTIC, SOIC-4
文件頁(yè)數(shù)： 16/84頁(yè)
文件大?。?/td> 1007K
代理商： MCV14ATI/SL
2009 Microchip Technology Inc.
Preliminary
DS41338B-page 21
MCV14A
4.1
Reading Data Memory
To read a memory location, the user must write the
address to be read into the EEADR register and then
set the RD bit in the EECON register. The data will be
available in the next instruction cycle.
EXAMPLE 4-1:
FLASH DATA MEMORY
READ
4.2
Erasing a Data Memory Row
In order to write new data to the Flash data memory,
the program memory row that is being addressed by
EEADR<5:0> must be erased.
To prevent a spurious row erasure, a specific
sequence must be executed to initiate the erase to the
program memory. The sequence is as follows:
- Set the FREE bit (enable Flash data memory
row erase)
- Set the WREN bit (enable writes to the Flash
data memory array)
- Set the WR bit (initiates the row erase of the
Flash data memory array)
If the WREN bit is not set in the instruction cycle after
the FREE bit is set, the FREE bit will be cleared in
hardware.
If the WR bit is not set in the instruction cycle after the
WREN bit is set, the WREN bit will be cleared in
hardware.
Both of these sequences is to prevent an accidental
erase of the Flash data memory.
EXAMPLE 4-2:
ERASE DATA MEMORY
ROW
4.3
Writing a Data Memory Word
To write a memory location, the user must write the
address to be written to into the EEADR register. He
must then load the data to be written into the EEDATA
register. Once the data and address have been
loaded, a specific sequence must be executed to
initiate the write to the program memory. The
sequence is as follows:
Set the WREN bit (enable writes to the Flash data
memory array)
Set the WR bit (initiates the write to the Flash data
memory array)
If the WR bit is not set in the instruction cycle after the
WREN bit is set, the WREN bit will be cleared in
hardware.
This sequence is to prevent an accidental write to the
Flash memory.
Note: Only a BSF command will work to enable the
Flash data memory read documented in
Example 4-1. No other sequence of com-
mands will work, no exceptions.
BSF
FSR,5
;SWITCH TO BANK 1
MOVLW
EE_ADR_READ ;LOAD ADDRESS TO READ
BSF
EECON,RD
;INITITATE THE READ
INSTRUCTION
;IS DECODED
MOVF
EEDATA,W
;GET NEW DATA
Note: The FREE bit may be set by any command
normally used by the core. However, the
WREN and WR bits can only be set using a
series of BSF commands, as documented in
No
other
sequence
of
commands will work, no exceptions.
BSF
FSR,5
;SWITCH TO BANK 1
MOVLW
EE_ADR_ERASE
;LOAD ADDRESS TO ERASE
MOVWF
EEADR
;LOAD ADDRESS TO SFR
BSF
EECON,FREE
;SELECT ERASE
BSF
EECON,WREN
;ENABL FLASH PROG’ING
BSF
EECON,WR
;INITITATE ERASE
xxx
;NEXT INSTRUCTION
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