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參數(shù)資料
| 型號： | MCV14ATI/SL |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, FLASH, 20 MHz, RISC MICROCONTROLLER, PDSO14 |
| 封裝： | 3.90 MM, PLASTIC, SOIC-4 |
| 文件頁數(shù)： | 32/84頁 |
| 文件大?。?/td> | 1007K |
| 代理商： | MCV14ATI/SL |
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MCV14A
DS41338B-page 36
Preliminary
2009 Microchip Technology Inc.
REGISTER 7-1:
CONFIG: CONFIGURATION WORD REGISTER
CPDF
IOSCFS
MCLRE
CP
WDTE
FOSC2
FOSC1
FOSC0
bit 7
bit 0
bit 7
CPDF: Code Protection bit – Flash Data Memory
1
= Code protection off
0
= Code protection on
bit 6
IOSCFS: Internal Oscillator Frequency Select bit
1
= 8 MHz INTOSC speed
0
= 4 MHz INTOSC speed
bit 5
MCLRE: Master Clear Enable bit
1
= RB3/MCLR pin functions as MCLR
0
= RB3/MCLR pin functions as RB3, MCLR internally tied to VDD
bit 4
CP: Code Protection bit – User Program Memory
1
= Code protection off
0
= Code protection on
bit 3
WDTE: Watchdog Timer Enable bit
1
= WDT enabled
0
= WDT disabled
bit 2-0
FOSC<2:0>: Oscillator Selection bits
000
= LP oscillator and 18 ms DRT
001
= XT oscillator and 18 ms DRT
010
= HS oscillator and 18 ms DRT
011
= EC oscillator with RB4 function on RB4/OSC2/CLKOUT and 1 ms DRT(1)
100
= INTRC with RB4 function on RB4/OSC2/CLKOUT and 1 ms DRT(1)
101
= INTRC with CLKOUT function on RB4/OSC2/CLKOUT and 1 ms DRT(1)
110
= EXTRC with RB4 function on RB4/OSC2/CLKOUT and 1 ms DRT(1)
111
= EXTRC with CLKOUT function on RB4/OSC2/CLKOUT and 1 ms DRT(1)
Note 1:
DRT length (18 ms or 1 ms) is a function of Clock mode selection. It is the responsibility of the application
designer to ensure the use of either 18 ms (nominal) DRT or the 1 ms (nominal) DRT will result in accept-
able operation. Refer to Section 11.1 “DC Characteristics: MCV14A (Industrial)” and Section 11.2
“DC Characteristics: MCV14A” for VDD rise time and stability requirements for this mode of operation.
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