參數(shù)資料
型號: MCZ33970EG
廠商: 飛思卡爾半導體(中國)有限公司
英文描述: Dual Gauge Driver Integrated Circuit with Improved Damping Algorithms
中文描述: 雙計驅動集成電路與改進的阻尼算法
文件頁數(shù): 3/36頁
文件大?。?/td> 430K
代理商: MCZ33970EG
Analog Integrated Circuit Device Data
Freescale Semiconductor
3
33970
PIN CONNECTIONS
PIN CONNECTIONS
Figure 3. 33970 Pin Connections
Table 1. 33970 Pin Definitions
A functional description of each pin can be found in the Functional Pin Description section beginning on
page 10
.
Pin Number
Pin Name
Pin Function
Formal Name
Definition
1
2
3
4
COS0+
COS0
SIN0+
SIN0
Output
H-Bridge Outputs
0
Each pin is the output pin of a half bridge, designed to source or sink
current.
5 – 8,
17– 20
GND
Ground
Ground
These pins serve as the ground for the source of the low-side output
transistors as well as the logic portion of the device.
9
CS
Input
Chip Select
This pin is connected to a chip select output of a LSI IC.
10
SCLK
Input
Serial Clock
This pin is connected to the SCLK pin of the master device and acts as a
bit clock for the SPI port.
11
SO
Output
Serial Output
This pin is connected to the SPI Serial Data Input pin of the master
device, or to the SI pin of the next device in a daisy chain.
12
SI
Input
Serial Input
This pin is connected to the SPI Serial Data Output pin of the master
device from which it receives output command data.
13
RTZ
Output
Multiplexed Output
This is a multiplexed output pin, for the non-driven coil, during a Return to
Zero (RTZ) event.
14
VDD
Input
Voltage
This SPI and logic power supply input will work with 5.0 V supplies.
15
RST
Input
Reset
This input has an internal active pull-up.
16
VPWR
Input
Battery Voltage
Power supply.
21
22
23
24
SIN1
SIN1+
COS1
COS1+
Output
H-Bridge Outputs 1
Each of these pins are the output pin of a half bridge, designed to source
or sink current.
COS0+
COS0-
SIN0+
SIN0-
GND
GND
GND
GND
CS
SCLK
SO
SI
1
2
3
4
5
6
7
8
9
10
11
12
24
23
22
21
20
19
18
17
16
15
14
13
COS1+
COS1-
SIN1+
SIN1-
GND
GND
GND
GND
VPWR
RST
VDD
RTZ
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相關代理商/技術參數(shù)
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