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參數(shù)資料
| 型號： | MH1S72CPG-15 |
| 廠商： | Mitsubishi Electric Corporation |
| 英文描述： | 75497472-BIT (1048576-WORD BY 72-BIT)SynchronousDRAM |
| 中文描述： | 75497472位（1048576 - Word的72位）SynchronousDRAM |
| 文件頁數(shù)： | 25/47頁 |
| 文件大?。?/td> | 681K |
| 代理商： | MH1S72CPG-15 |
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MH1S72CPG-10,-12,-15
75497472-BIT (1048576-WORD BY 72-BIT)SynchronousDRAM
MITSUBISHI LSIs
( / 47 )
25
MITSUBISHI
ELECTRIC
28.Mar.1997
Preliminary Spec.
Some contents are subject to change without notice.
MIT-DS-0089-3.0
AUTO REFRESH
Single cycle of auto-refresh is initiated with a REFA(/CS=/RAS=/CAS=L,
/WE=/CKE=H) command. The refresh address is generated internally. 4096 REFA
cycle within 64ms refresh 16Mbit memory cells. The auto-refresh is performed on
each bank alternately(ping-pong refresh). Before performing an auto-refresh, both
banks must be in the idle state. Additional commands must not be supplied to the
device before tRC from the REFA command.
Auto-Refresh
CK
/S
/RAS
/CAS
/WE
CKE
A0-10
BA
Auto Refresh on Bank 0
Auto Refresh on Bank 1
minimum tRC
NOP or DESLECT
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