參數(shù)資料
型號(hào)： MH1S72CPG-15
廠商： Mitsubishi Electric Corporation
英文描述： 75497472-BIT (1048576-WORD BY 72-BIT)SynchronousDRAM
中文描述： 75497472位（1048576 - Word的72位）SynchronousDRAM
文件頁數(shù)： 30/47頁
文件大?。?/td> 681K
代理商： MH1S72CPG-15
MH1S72CPG-10,-12,-15
75497472-BIT (1048576-WORD BY 72-BIT)SynchronousDRAM
MITSUBISHI LSIs
( / 47 )
30
MITSUBISHI
ELECTRIC
28.Mar.1997
Preliminary Spec.
Some contents are subject to change without notice.
MIT-DS-0089-3.0
AVERAGE SUPPLY CURRENT from Vdd
(Ta=0 ~70°C, Vdd = 3.3 ± 0.3V, Vss = 0V, unless otherwise noted)
AC OPERATING CONDITIONS AND CHARACTERISTICS
(Ta=0 ~ 70°C, Vdd = 3.3 ± 0.3V, Vss = 0V, unless otherwise noted)
Symbol
Parameter
Test Condition
Limits
Min. Max.
2.4
Unit
VOH(DC) High-Level Output Voltage(DC)
VOL(DC) Low-Level Output Voltage(DC)
VIOZ
)
Ii
Input Current
IOH=-2mA
IOL=2mA
CL=50pF,
IOH=-2mA
VIH=0 ~ Vdd+0.3V
V
V
V
V
0.4
10 uA
High-Level Output Voltage(AC)
Off-stare Output Current
2
50 uA
450
650
90
10
175
600
300
375
550
80
10
150
500
250
5
5
Q floating VO=0 ~ Vdd
-10
-50
Symbol
Parameter
Test Condition
Limits(max)
-12
500
750
100
10
175
650
325
5
Unit
-10
-15
Icc1s
Icc1d
Icc2h
Icc2l
Icc3
Icc4
Icc5
Icc6
operating current, single bank
operating current, dual bank
standby current, CKE=H
standby current, CKE=L
active standby current
burst current
auto-refresh current
self-refresh current
tRC=min.tCLK=min, BL=1, CL=3
tRC=min.tCLK=min, BL=1, CL=3
both banks idle, tCLK=min, CKE=H
both banks idle, tCLK=min, CKE=L
both banks active, tCLK=min, CKE=H
mA
mA
mA
mA
mA
mA
mA
mA
tCLK=min, BL=4, CL=3, 1 bank idle(discerte)
tRC=min, tCLK=min
CKE <0.2V
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