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參數(shù)資料
| 型號： | MH4S64CBMD-15B |
| 廠商： | Mitsubishi Electric Corporation |
| 英文描述： | 268435456-BIT (4194304-WORD BY 64-BIT)SynchronousDRAM |
| 中文描述： | 268435456位（4194304字，64位）SynchronousDRAM |
| 文件頁數(shù)： | 6/55頁 |
| 文件大?。?/td> | 586K |
| 代理商： | MH4S64CBMD-15B |
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MH4S64BLG -7,-8,-10
268435456-BIT (4194304 - WORD BY 64-BIT)SynchronousDRAM
MITSUBISHI LSIs
( / 55 )
6
MITSUBISHI
ELECTRIC
29.Oct.1998
Preliminary Spec.
Some contents are subject to change without notice.
MIT-DS-0227-0.5
COMMAND TRUTH TABLE
COMMAND
MNEMONIC
CKE
n-1
CKE
n
/S
/RAS /CAS
/WE BA0,1
A10
A0-9
Deselect
No Operation
DESEL
NOP
H
H
X
X
H
L
X
H
X
H
X
H
X
X
X
X
X
X
Row Adress Entry &
Bank Activate
ACT
H
X
L
L
H
H
V
V
V
Single Bank Precharge
Precharge All Bank
Column Address Entry
& Write
PRE
PREA
H
H
X
X
L
L
L
L
H
H
L
L
V
X
L
H
X
X
WRITE
H
X
L
H
L
L
V
L
V
Column Address Entry
& Write with Auto-
Precharge
WRITEA
H
X
L
H
L
L
V
H
V
Column Address Entry
& Read
READ
H
X
L
H
L
H
V
L
V
Column Address Entry
& Read with Auto
Precharge
READA
H
X
L
H
L
H
V
H
V
Auto-Refresh
Self-Refresh Entry
Self-Refresh Exit
REFA
REFS
REFSX
H
H
L
L
H
H
H
L
H
H
X
X
L
L
H
L
L
L
L
L
X
H
H
L
L
L
X
H
H
L
H
H
X
H
L
L
X
X
X
X
X
L
X
X
X
X
X
L
X
X
X
X
X
Burst Terminate
Mode Register Set
TERM
MRS
V*1
H =High Level, L = Low Level, V = Valid, X = Don't Care, n = CK cycle number
NOTE:
1.A7-9 = 0, A0-6 = Mode Address
A11
X
X
V
X
X
X
X
X
X
X
X
X
X
X
L
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| MH4S64CWZTJ-1539 | 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:268435456-BIT (4194304-WORD BY 64-BIT)SynchronousDRAM |
| MH4S64CZTJ-12 | 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:268435456-BIT (4194304-WORD BY 64-BIT)SynchronousDRAM |
| MH4S64CZTJ-15 | 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:268435456-BIT (4194304-WORD BY 64-BIT)SynchronousDRAM |
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