參數資料
型號: MH64D72KLH-75
廠商: Mitsubishi Electric Corporation
英文描述: 4,831,838,208-BIT (67,108,864-WORD BY 72-BIT) Double Data Rate Synchronous DRAM Module
中文描述: 4831838208位(67108864 - Word的72位),雙數據速率同步DRAM模塊
文件頁數: 14/38頁
文件大?。?/td> 326K
代理商: MH64D72KLH-75
MITSUBISHI LSIs
MITSUBISHI ELECTRIC
MH64D72KLG-75,-10
4,831,838,208-BIT (67,108,864-WORD BY 72-BIT) Double Data Rate Synchronous DRAM Module
MIT-DS-0389-1.1
20.Nov.2000
Preliminary Spec.
Some contents are subject to change without notice.
14
EXTENDED MODE REGISTER
DLL disable / enable mode can be programmed by setting the extended
mode register (EMRS). The extended mode register stores these data
until the next EMRS command, which may be issued in idle state.
After tMRD from a EMRS command, the DDR DIMM is ready for new
command.
/S0
/RAS
/CAS
/WE
A11-A0
/CK0
V
CK0
BA0
BA1
0
1
DLL
Disable
DLL enable
DLL disable
A11 A10 A9
A8
A7
A6
A5
A4
A3
A2
A1
A0
BA1 BA0
0
0
0
0
DD
1
0
0
DS
QFC
0
0
0
0
0
1
Drive
Strength
Normal
Weak
0
1
QFC
Disable
Enable
相關PDF資料
PDF描述
MH64S64APFH-6 4294967296-BIT (67108864 - WORD BY 64-BIT)SynchronousDRAM
MH64S64APFH-6L 4294967296-BIT (67108864 - WORD BY 64-BIT)SynchronousDRAM
MH64S64APFH-7 4294967296-BIT (67108864 - WORD BY 64-BIT)SynchronousDRAM
MH64S64APFH-7L 4294967296-BIT (67108864 - WORD BY 64-BIT)SynchronousDRAM
MH64S72AWJA-6 4,831,838,208-BIT ( 67,108,864-WORD BY 72-BIT ) Synchronous DYNAMIC RAM
相關代理商/技術參數
參數描述
MH64FAD 制造商:MTRONPTI 制造商全稱:MTRONPTI 功能描述:8 pin DIP, 3.3 or 5.0 Volt, HCMOS/TTL Clock Oscillator
MH64FAD-R 制造商:MTRONPTI 制造商全稱:MTRONPTI 功能描述:8 pin DIP, 3.3 or 5.0 Volt, HCMOS/TTL Clock Oscillator
MH64FAG 制造商:MTRONPTI 制造商全稱:MTRONPTI 功能描述:8 pin DIP, 3.3 or 5.0 Volt, HCMOS/TTL Clock Oscillator
MH64FAG-R 制造商:MTRONPTI 制造商全稱:MTRONPTI 功能描述:8 pin DIP, 3.3 or 5.0 Volt, HCMOS/TTL Clock Oscillator
MH64FBD 制造商:MTRONPTI 制造商全稱:MTRONPTI 功能描述:8 pin DIP, 3.3 or 5.0 Volt, HCMOS/TTL Clock Oscillator