參數(shù)資料
型號: MH64D72KLH-75
廠商: Mitsubishi Electric Corporation
英文描述: 4,831,838,208-BIT (67,108,864-WORD BY 72-BIT) Double Data Rate Synchronous DRAM Module
中文描述: 4831838208位(67108864 - Word的72位),雙數(shù)據(jù)速率同步DRAM模塊
文件頁數(shù): 32/38頁
文件大小: 326K
代理商: MH64D72KLH-75
MITSUBISHI LSIs
MITSUBISHI ELECTRIC
MH64D72KLG-75,-10
4,831,838,208-BIT (67,108,864-WORD BY 72-BIT) Double Data Rate Synchronous DRAM Module
MIT-DS-0389-1.1
20.Nov.2000
Preliminary Spec.
Some contents are subject to change without notice.
32
[SELF REFRESH]
Self -refresh mode is entered by issuing a REFS command (/CS=/RAS=/CAS=L,/WE=H,CKE=L). Once
the self-refresh is initiated, it is maintained as long as CKE is kept low. During the self-refresh mode, CKE
is asynchronous and the only enable input, all other inputs including CLK are disabled and ignored, so that
power consumption due to synchronous inputs is saved. To exit the self-refresh, supplying stable CLK
inputs, asserting DESEL or NOP command and then asserting CKE for longer than tXSNR/tXSRD.
Self-Refresh
/RAS
CKE
/CS
/CAS
/WE
A0-12
BA0,1
tXSNR
Self Refresh Exit
/CLK
CLK
X
Y
X
Y
tXSRD
Act
Read
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