53.4.1.5 AC97 mode
In AC97 mode, the I2S transmits a 16-bit tag slot at the start of a frame and the rest of the
slots (in that frame) are all 20-bits wide. The same sequence is followed while receiving
data. Refer to the AC97 specification for details regarding transmit and receive sequences
and data formats.
Note
The Audio Codec specification released in 1997 [AC '97]
defines the architecture and digital Interface, specifically
designed for implementing audio and modem I/O functionality
in personal computers. Companion specifications include the
Modem Codec [MC '97], and the combined Audio/Modem
Codec standard [AMC '97]. The current version of AC '97 was
produced in 2002. The AC-97 specification defines a
recommended 48-pin QFP IC package.
Since the I2S has only one RxDATA pin only one codec is supported. Secondary codecs
are not supported.
When AC97 mode is enabled, the hardware internal overrides the following settings. The
programmed register values are not changed by entering AC97 mode but they no longer
apply to the module's operation. Writing to the programmed register fields updates their
values. These updates can be seen by reading back the register fields. However, these
settings do not take effect until AC97 mode is turned off.
The register bits within the bracket are equivalent settings:
Synchronous mode is entered (CR[SYN] = 1)
Network mode is selected (CR[NET] = 1)
Tx shift direction is msb transmitted first (TCR[TSHFD] = 0)
Rx shift direction is msb received first (RCR[RSHFD] = 0)
Tx data is clocked at rising edge of the clock (TCR[TSCKP] = 0)
Rx data is latched at falling edge of the clock (RCR[RSCKP] = 0)
Tx frame sync is active high (TCR[TFSI] = 0)
Rx frame sync is active high (RCR[RFSI] = 0)
Tx frame sync length is one-word-long-frame (TCR[TFSL] = 0)
Rx frame sync length is one-word-long-frame (RCR[RFSL] = 0)
Chapter 53 Integrated interchip sound (I2S)
K60 Sub-Family Reference Manual, Rev. 6, Nov 2011
Freescale Semiconductor, Inc.
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