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參數(shù)資料
| 型號： | ML2264 |
| 廠商： | Fairchild Semiconductor Corporation |
| 英文描述： | 4-Channel High-Speed 8-Bit A/D Converter with T/H (S/H)(具有跟蹤/保持（采樣/保持）電路的四通道8位高速A/D轉(zhuǎn)換器) |
| 中文描述： | 4通道高速8位A / D轉(zhuǎn)換器的T / H（上的S /高）（具有跟蹤/保持（采樣/保持）電路的四通道8位高速的A / D轉(zhuǎn)換器） |
| 文件頁數(shù)： | 5/17頁 |
| 文件大?。?/td> | 307K |
| 代理商： | ML2264 |
ML2264
5
ELECTRICAL CHARACTERISTICS
(Continued)
Unless otherwise specified, T
A
= T
MIN
to T
MAX
, V
CC
= +V
REF
= 5V ± 5%, and –V
REF
= GND, and timing measured at 1.4V,
C
L
= 100pF. (Note 1)
ML2264XCX
TYP
PARAMETER
NOTES
CONDITIONS
MIN
(NOTE 3)
MAX
UNITS
AC and Dynamic Performance (Note 9) (Continued)
t
AH
, Multiplexer Address
Hold Time
4
SH/
TH
= GND, Figure 1
(Track & Hold Operation)
60
ns
t
AS
, Multiplexer Address
Setup Time
4
SH/
TH
= V
CC
, Figure 2
(Sample & Hold Operation)
225
ns
t
AH
, Multiplexer Address
Hold Time
4
SH/
TH
= V
CC
, Figure 2
(Sample & Hold Operation)
60
ns
AC Performance Read Mode (Pin 5 = 0V), Figure 4
t
RDY
,
CS
to RDY Delay
t
RDD
,
RD
Low to RDY Delay
t
CSS
,
CS
to
RD
,
WR
Setup Time
t
CSH
,
CS
to
RD
,
WR
Hold Time
t
CRD
, Conversion Time —
RD
Low to
INT
low
4
0
60
ns
4, 9
Figure 3
1020
ns
4
0
ns
4
0
ns
4, 9
1020
ns
t
ACC0
, Data Access Time
RD
to Data Valid
4
t
CRD
–10
t
CRD
+20
ns
t
RDPW
,
RD
Pulse Width
t
INTH
,
RD
to
INT
Delay
t
DH
, Data Hold Time —
RD
Rising Edge to Data
High Impedance State
4
t
CRD
+30
0
ns
4, 9
65
ns
5, 9
Figure 3
0
50
ns
t
P
, Delay Time Between
Conversions —
INT
Low
to
RD
Low
4, 9
Sample & Hold Mode,
SH/
TH
= V
CC
Track & Hold Mode,
SH/
TH
= GND
300
ns
240
ns
AC Performance Write-Read Mode (Pin 5 = 5V), Figures 5 and 6
t
CSS
,
CS
to
RD
,
WR
Setup Time
t
CSH
,
CS
to
RD
,
WR
Hold Time
t
WR
,
WR
Pulse Width
4
0
ns
4
0
ns
4
SH/
TH
= V
CC
SH/
TH
= GND
190
50K
ns
5
320
50K
ns
t
RD
, Read Time —
WR
High to
RD
Low Delay
4
t
RD
< t
INTL
275
ns
t
RI
,
RD
to
INT
Delay
t
ACC1
, Data Access Time
—
RD
Low to Data Valid
4, 9
t
RD
< t
INTL
t
RD
< t
INTL
0
235
ns
4
0
240
ns
t
CWR-RD
, Conversion Time
—
WR
Falling Edge to
INT
Low
4, 8, 9
t
RD
< t
INTL
, SH/
TH
= V
CC
t
RD
< t
INTL
, SH/
TH
= GND
700
ns
5, 8, 9
830
ns
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