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參數(shù)資料
| 型號： | ML2264 |
| 廠商： | Fairchild Semiconductor Corporation |
| 英文描述： | 4-Channel High-Speed 8-Bit A/D Converter with T/H (S/H)(具有跟蹤/保持（采樣/保持）電路的四通道8位高速A/D轉(zhuǎn)換器) |
| 中文描述： | 4通道高速8位A / D轉(zhuǎn)換器的T / H（上的S /高）（具有跟蹤/保持（采樣/保持）電路的四通道8位高速的A / D轉(zhuǎn)換器） |
| 文件頁數(shù)： | 6/17頁 |
| 文件大?。?/td> | 307K |
| 代理商： | ML2264 |
ML2264
6
ELECTRICAL CHARACTERISTICS
(Continued)
Unless otherwise specified, T
A
= T
MIN
to T
MAX
, V
CC
= +V
REF
= 5V ± 5%, and –V
REF
= GND, and timing measured at 1.4V,
C
L
= 100pF. (Note 1)
ML2264XCX
TYP
PARAMETER
NOTES
CONDITIONS
MIN
(NOTE 3)
MAX
UNITS
AC Performance Write-Read Mode (Pin 5 = 5V) Figures 5 and 6 (Continued)
t
INTL
, Internal Comparison
Time —
WR
Rising Edge
to
INT
Low
4, 9
t
RD
> t
INTL
620
ns
t
ACC2
, Data Access Time
—
RD
to Data Valid
4
t
RD
> t
INTL
0
50
ns
t
DH
, Data Hold Time —
RD
Rising Edge to Data
High Impedance State
5, 9
Figure 3
0
50
ns
t
INTH
,
RD
to
INT
Delay
t
P
, Delay Time Between
Conversions —
INT
Low
to
WR
Low
4, 9
0
65
ns
4, 9
Sample & Hold Mode,
SH/
TH
= V
CC
Track & Hold Mode,
SH
/TH
= GND
300
ns
240
ns
t
IHWR
,
WR
to
INT
Delay
t
ID
,
INT
to Data Valid Delay
4, 9
Standalone Mode
0
90
ns
4, 9
Standalone Mode
0
20
ns
Note 1:
Note 2:
Note 3:
Note 4:
Note 5:
Note 6:
Limits are guaranteed by 100% testing, sampling, or correlation with worst-case test conditions.
When the voltage at any pin exceeds the power supply rails (V
IN
< GND or V
IN
> V
CC
) the absolute value of current at that pin should be limited to 25mA or less.
Typicals are parametric norm at 25°C.
Parameter guaranteed and 100% production tested.
Parameter guaranteed. Parameters not 100% tested are not in outgoing quality level calculation.
Total unadjusted error includes offset, full scale, linearity, sample and hold, and multiplexer errors. Total unadjusted error is tested at the minimum specified times
for
WR
,
RD
, t
R1
, and t
P
. For example, for the ML2264XCX in the sample and hold mode,
WR
/
RD
mode: t
WR
= 190ns, t
RD
= 275ns with a frequency of 1.000MHz
(cycle time of 1000ns).
For –V
REF
V
IN
the digital output code will be 0000 0000. Two on-chip diodes are tied to the analog input which will forward conduct for analog input voltages one
diode drop below ground or one diode drop greater than the V
CC
supply. Be careful, during testing at low V
CC
levels (4.5V), as high level analog inputs (5V) can
cause this input diode to conduct — especially at elevated temperatures, and cause errors for analog inputs near full scale. The spec allows 100mV forward bias of
either diode. This means that as long as the analog V
IN
or V
REF
does not exceed the supply voltage by more than 100mV, the output code will be correct. To achieve
an absolute 0V
DC
to 5V
DC
input voltage range will therefore require a minimum supply voltage of 4.900V
DC
over temperature variations, initial tolerance and
loading.
Conversion time, write-read mode = t
WR
+ t
RD
+ t
RI
.
Defined from the time an output crosses 0.8V or 2.4V.
Note 7:
Note 8:
Note 9:
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