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參數(shù)資料
| 型號： | MM908E621ACDWB |
| 廠商： | Freescale Semiconductor |
| 文件頁數(shù)： | 24/60頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC QUAD HALF BRDG TRPL SW 54SOIC |
| 標(biāo)準(zhǔn)包裝： | 26 |
| 應(yīng)用： | 自動鏡像控制 |
| 核心處理器： | HC08 |
| 程序存儲器類型： | 閃存（16 kB） |
| 控制器系列： | 908E |
| RAM 容量： | 512 x 8 |
| 接口： | SCI，SPI |
| 輸入/輸出數(shù)： | 12 |
| 電源電壓： | 9 V ~ 16 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 54-BSSOP（0.295"，7.50mm 寬）裸露焊盤 |
| 包裝： | 管件 |
| 供應(yīng)商設(shè)備封裝： | 54-SOICW-EP |
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Analog Integrated Circuit Device Data
30
Freescale Semiconductor
908E621
FUNCTIONAL DEVICE OPERATION
OPERATIONAL MODES
1 = Wake-up due to L0 pin
0 = no Wake-up due to L0 pin
ANALOG DIE INPUTS/OUTPUTS
LIN PHYSICAL LAYER
The LIN bus pin provides a physical layer for single wire
communication in automotive applications. The LIN physical
layer is designed to meet the LIN physical layer specification.
The LIN driver is a low side MOSFET with internal current
limitation and thermal shutdown. An internal pull-up resistor
with a serial diode structure is integrated, so no external pull-
up components are required for the application in a slave
node. The fall time from dominant to recessive and the rise
time from recessive to dominant is controlled. The symmetry
between both slew rate controls is guaranteed.
The slew rate can be selected for optimized operation at
10 and 20 kBit/s as well as high baud rates for test and
programming. The slew rate can be adapted with 2 bits
SRS[1:0] in the System Control Register. The initial slew rate
is optimized for 20 kBit/s.
The LIN pin offers high susceptibility immunity level from
external disturbance, guaranteeing communication during
external disturbance.
The LIN transmitter circuitry is enabled by setting the
PSON bit in the System Control Register (SYSCTL).
If the transmitter works in the current limitation region, the
LINCL bit in the System Status Register (SYSSTAT) is set
and the LIN transceiver is disabled after a certain time.
For improved performance and safe behavior, in case of
LIN bus short to Ground or LIN bus leakage during low power
mode, the internal pull-up resistor on the LIN pin is
disconnected from VSUP and a small current source keeps
the LIN bus at recessive level. In case of a LIN bus short to
GND, this feature will reduce the current consumption in
STOP and SLEEP modes.
Figure 16. LIN Interface
TXD Pin
The TXD pin is the MCU interface to control the state of the
LIN transmitter (see Figure 2). When TXD is LOW, the LIN
pin is low (dominant state). When TXD is HIGH, the LIN
output MOSFET is turned off (recessive state). The TXD pin
has an internal pull-up current source to set the LIN bus to a
recessive state in the event, for instance, if the
Control
Receiv
er
Wake-up
RXD
TXD
GND
VSUP
Slope
Control
30k
10A
LIN bus
SRS[1:0]
PSON
LINCL
LINIF
Wake-up
Filter
MODE
TESTMODE
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MM908E621ACDWB/R2 | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:Integrated Quad Half-bridge and Triple High Side with Embedded MCU and LIN for High End Mirror |
| MM908E621ACDWBR2 | 功能描述:8位微控制器 -MCU QUAD HB / TRIPLE HS 841B RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT |
| MM908E621ACPEK | 功能描述:8位微控制器 -MCU QUAD H-B/3-HS W/MCU & LI RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT |
| MM908E621ACPEKR2 | 功能描述:8位微控制器 -MCU QUAD HB AND TRIPLE HS RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT |
| MM908E622 | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:Integrated Quad Half-Bridge, Triple High-Side and EC Glass Driver with Embedded MCU and LIN for High End Mirror |
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