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參數(shù)資料
| 型號(hào)： | MM908E621ACDWB |
| 廠商： | Freescale Semiconductor |
| 文件頁數(shù)： | 36/60頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC QUAD HALF BRDG TRPL SW 54SOIC |
| 標(biāo)準(zhǔn)包裝： | 26 |
| 應(yīng)用： | 自動(dòng)鏡像控制 |
| 核心處理器： | HC08 |
| 程序存儲(chǔ)器類型： | 閃存（16 kB） |
| 控制器系列： | 908E |
| RAM 容量： | 512 x 8 |
| 接口： | SCI，SPI |
| 輸入/輸出數(shù)： | 12 |
| 電源電壓： | 9 V ~ 16 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 54-BSSOP（0.295"，7.50mm 寬）裸露焊盤 |
| 包裝： | 管件 |
| 供應(yīng)商設(shè)備封裝： | 54-SOICW-EP |
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Analog Integrated Circuit Device Data
Freescale Semiconductor
41
908E621
FUNCTIONAL DEVICE OPERATION
OPERATIONAL MODES
HSxPWM — High Side PWM on/off Bits
These read/write bits enable the PWM control of the High
Side Fet’s. Reset clears the HSxPWM bits.
1 = High Side x is controlled by PWM input signal
0 = High Side x is not controlled by PWM input signal
High Side Status Register (HSSTAT)
HSxOCF — High Side Over-current Flag Bit
This read/write flag is set by an over-current condition at
the high side drivers x. Clear HSxOCF and enable the HS
Driver by writing a logic [1] to HSxOCF. Writing a logic [0] to
HSxOCF has no effect. Reset clears the HSxOCF bit.
1 = over-current condition on high side drivers has
occurred
0 = no over-current condition on high side drivers has
occurred
HVDDOCF — HVDD Output Over-current Flag Bit
This read/write flag is set by an over-current condition at
HVDD pin. Clear HVDDOCF and enable the output by writing
a logic [1] to the HVDDOCF Flag. Writing a logic [0] to
HVDDOCF has no effect. Reset clears the HVDDOCF bit.
1 = over-current condition on VDD output has occurred
0 = no over-current condition on VDD output has
occurred
System Control Register (SYSCTL)
PSON — Power Stages On Bit
This read/write bit enables the power stages (half-bridges,
high sides, LIN transmitter, A0 Current Sources and HVDD
output). Reset clears the PSON bit.
1 = power stages enabled
0 = power stages disabled
STOP — Change to STOP Mode Bit
This write bit instructs the chip to enter Stop mode (See
Operational Modes on page 24). Reset or CPU interrupt
requests clear the STOP bit.
1 = go to Stop mode
0 = not in stop mode
In order to safely enter Stop mode, all other bits (Bit7-Bit2)
have to be “0”. Otherwise the STOP command will not
execute.
SLEEP — Change to SLEEP Mode Bit
This write bit instructs the chip to enter Sleep mode (See
Operational Modes on page 24). Reset or CPU interrupt
requests clear the SLEEP bit.
1 = go to Sleep mode
0 = not in sleep mode
In order to safely enter Sleep mode all other bits (Bit7-Bit2)
have to be “0”. Otherwise the SLEEP command will not
execute.
HTIS0-1 — High Temperature Interrupt Shutdown Bits
This read/write bit selects the power stage behavior at
High Temperature Interrupt (HTI). Reset clears the HTIS0-1
bits.
The HTIS0 bit selects the behavior of the high side HS1:3
and the high side FET of the half-bridges HB1:4.
1 = automatic HTI shutdown of the high side drivers
disabled
0 = automatic HTI shutdown of the high side drivers
enabled
The HTIS1 bit selects the behavior of the low side drivers
of the half-bridges HB1:4.
1 = automatic HTI shutdown of the low side drivers
disabled
0 = automatic HTI shutdown of the low side drivers
enabled
The user has to take care to protect the device against
thermal destruction!
VIS — Over/Under-voltage Interrupt Shutdown
This read/write bit selects the power stage behavior at LVI/
HVI. Reset clears the VIS bit.
1 = automatic LVI/HVI shutdown disabled
0 = automatic LVI/HVI shutdown enabled
SRS0-1 — LIN Slew Rate Select Bits
These read/write bits enable the user to select the
appropriate LIN slew rate for different Baudrate
configurations. Reset clears the SRS1:0 bits.
Register Name and Address: HSSTAT - $04
Bit7
6
5
4
3
2
1
Bit0
Read
HVDD
OCF
0
HS3O
CF
HS2O
CF
HS1O
CF
Write
Reset
0
Register Name and Address: SYSCTL - $00
Bit7
6
5
4
3
2
1
Bit0
Read
PSON
00
HTIS1 HTIS0
VIS
SRS1
SRS0
Write
STOP SLEEP
Reset
0
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MM908E621ACDWB/R2 | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:Integrated Quad Half-bridge and Triple High Side with Embedded MCU and LIN for High End Mirror |
| MM908E621ACDWBR2 | 功能描述:8位微控制器 -MCU QUAD HB / TRIPLE HS 841B RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時(shí)鐘頻率:50 MHz 程序存儲(chǔ)器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT |
| MM908E621ACPEK | 功能描述:8位微控制器 -MCU QUAD H-B/3-HS W/MCU & LI RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時(shí)鐘頻率:50 MHz 程序存儲(chǔ)器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT |
| MM908E621ACPEKR2 | 功能描述:8位微控制器 -MCU QUAD HB AND TRIPLE HS RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時(shí)鐘頻率:50 MHz 程序存儲(chǔ)器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT |
| MM908E622 | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:Integrated Quad Half-Bridge, Triple High-Side and EC Glass Driver with Embedded MCU and LIN for High End Mirror |
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