參數(shù)資料
型號(hào): MMFT2N02EL
廠商: ON SEMICONDUCTOR
英文描述: Power MOSFET 2 Amps, 20 Volts N-Channel(2A,20V,N溝道增強(qiáng)型功率MOS場(chǎng)效應(yīng)管)
中文描述: 功率MOSFET 2安培,20伏特N溝道(第2A,20V的,?溝道增強(qiáng)型功率馬鞍山場(chǎng)效應(yīng)管)
文件頁數(shù): 4/12頁
文件大?。?/td> 114K
代理商: MMFT2N02EL
MMFT2N02EL
http://onsemi.com
4
FORWARD BIASED SAFE OPERATING AREA
The FBSOA curves define the maximum drain–to–source
voltage and drain current that a device can safely handle
when it is forward biased, or when it is on, or being turned
on. Because these curves include the limitations of
simultaneous high voltage and high current, up to the rating
of the device, they are especially useful to designers of linear
systems. The curves are based on an ambient temperature of
25
°
C and a maximum junction temperature of 150
°
C.
Limitations for repetitive pulses at various ambient
temperatures can be determined by using the thermal
response curves. ON Semiconductor Application Note,
AN569, “Transient Thermal Resistance–General Data and
Its Use” provides detailed instructions.
SWITCHING SAFE OPERATING AREA
The switching safe operating area (SOA) is the boundary
that the load line may traverse without incurring damage to
the MOSFET. The fundamental limits are the peak current,
IDM and the breakdown voltage, BVDSS. The switching SOA
is applicable for both turn–on and turn–off of the devices for
switching times less than one microsecond.
Figure 7. Maximum Rated Forward Biased
Safe Operating Area
VGS = 15 V
SINGLE PULSE
TA = 25
°
C
1 s
20ms
DC
10
I
0.1
1
0.1
0.01
1
10
100
VDS, DRAIN-TO-SOURCE VOLTAGE (VOLTS)
100ms
500ms
RDS(on) LIMIT
THERMAL LIMIT
PACKAGE LIMIT
1.0
0.1
0.001
1.0E-05
1.0E-04
1.0E-03
1.0E-02
t, TIME (s)
1.0E-01
1.0E+00
r
0.1
0.01
0.2
0.02
0.01
D = 0.5
SINGLE PULSE
(
0.05
R
θ
JA(t) = r(t) R
θ
JA
R
θ
JA = 156
°
C/W MAX
D CURVES APPLY FOR POWER
PULSE TRAIN SHOWN
READ TIME AT t1
TJ(pk) - TA = P(pk) R
θ
JA(t)
P(pk)
t1
t2
DUTY CYCLE, D = t1/t2
1.0E+01
Figure 8. Thermal Response
COMMUTATING SAFE OPERATING AREA (CSOA)
The Commutating Safe Operating Area (CSOA) of Figure 10 defines the limits of safe operation for commutated
source–drain current versus re–applied drain voltage when the source–drain diode has undergone forward bias. The curve shows
the limitations of IFM and peak VDS for a given rate of change of source current. It is applicable when waveforms similar to
those of Figure 9 are present. Full or half–bridge PWM DC motor controllers are common applications requiring CSOA data.
Device stresses increase with increasing rate of change of source current so dIS/dt is specified with a maximum value. Higher
values of dIS/dt require an appropriate derating of IFM, peak VDS or both. Ultimately dIS/dt is limited primarily by device,
package, and circuit impedances. Maximum device stress occurs during trr as the diode goes from conduction to reverse
blocking.
VDS(pk) is the peak drain–to–source voltage that the device must sustain during commutation; IFM is the maximum forward
source–drain diode current just prior to the onset of commutation.
VR is specified at 80% rated BVDSS to ensure that the CSOA stress is maximized as IS decays from IRM to zero.
RGS should be minimized during commutation. TJ has only a second order effect on CSOA.
Stray inductances in ON Semiconductor’s test circuit are assumed to be practical minimums. dVDS/dt in excess of 10 V/ns
was attained with dIS/dt of 400 A/
μ
s.
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