參數(shù)資料
型號(hào): MPC18730EP
廠商: 飛思卡爾半導(dǎo)體(中國(guó))有限公司
英文描述: Power Management IC with Five Regulated Outputs Programmed Through 3 Wire Serial Interface
中文描述: 與電源管理IC,通過3線串行接口編程五穩(wěn)壓輸出
文件頁(yè)數(shù): 12/35頁(yè)
文件大?。?/td> 617K
代理商: MPC18730EP
Analog Integrated Circuit Device Data
Freescale Semiconductor
12
18730
ELECTRICAL CHARACTERISTICS
TIMING DIAGRAMS
Figure 5. Serial Interface Timing Diagrams
Twelve bits immediately before start-up of STRB are
always effective. Upon power on, the internal power on reset
works to initialize the registers. Serial data is fetched in the
order of Add_[3], Add_[2], ..., Add_[0], DATA1_[3],
DATA1_[2], ...., DATA2_[0].
Table 5. Serial Interface Functions
Register Name Address
DATA1
DATA2
0 CLEAR, SLEEP
1000
CLEAR
SLEEP
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
1
Power Mode
0001
PSW1
PSW2
PGOOD1
VOUT2
SREG1
SREG2
SREG3
PGOOD2
2
Clock Select
0010
Ext / Int
Half Freq RSTB sleep S_Off_VGATE VG_Duty[3] VG_Duty[2] VG_Duty[1]
VG_Duty[0]
3
VO1_SENSE
0011
MSB
VO1_SENSE Output Voltage
LSB
S_Off_VO1_SENSE
4
VO2_SENSE
0100
MSB
VO2_SENSE Output Voltage
LSB
S_Off_VO2_SENSE
5
SREG1
0101
MSB
SREG1 Output Voltage
LSB
Reserved
6
SREG2
0110
MSB
SREG2 Output Voltage
LSB
7
SREG3
0111
MSB
SREG3 Output Voltage
LSB
CP Off
EXTG On
SCKIN
DATA
STRB
t
S
t
H
t
SSB
t
WCKH
t
WCKL
t
HCK
A3
D0
t
WSB
A2
Table 6. Block Operation
INPUT
OUTPUT
WAKE
(Int)
PGOOD1
(Int)
PGOOD1
PGOOD2(Int)
SEQ_SELECT
VGATE
VO1_SENSE
VO2_SENSE
VOUT1,2
REG
1,2,3
L
X
X
X
X
-
-
-
-
-
H
L
L
L
L
O
O
-
-
-
H
H
L
L
L
O
O
-
-
O
H
H
L
L
H
O
O
-
-
-
H
H
H
H
L
O
O
O
O
O
H
H
H
H
H
O
O
O
O
O
O : Operation, - : Stop, X : Don’t care
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